This file is a user guide to the gnu assembler as version 050707.
This document is distributed under the terms of the GNU Free Documentation License. A copy of the license is included in the section entitled “GNU Free Documentation License”.
Here is a brief summary of how to invoke as. For details, see Command-Line Options.
as [-a[cdhlns][=file]] [--alternate] [-D]
[--defsym sym=val] [-f] [-g] [--gstabs]
[--gstabs+] [--gdwarf-2] [--help] [-I dir] [-J]
[-K] [-L] [--listing-lhs-width=NUM]
[--listing-lhs-width2=NUM] [--listing-rhs-width=NUM]
[--listing-cont-lines=NUM] [--keep-locals] [-o
objfile] [-R] [--reduce-memory-overheads] [--statistics]
[-v] [-version] [--version] [-W] [--warn]
[--fatal-warnings] [-w] [-x] [-Z] [--target-help]
[target-options] [--|files ...]
Target Alpha options:
[-mcpu]
[-mdebug | -no-mdebug]
[-relax] [-g] [-Gsize]
[-F] [-32addr]
Target ARC options:
[-marc[5|6|7|8]]
[-EB|-EL]
Target ARM options:
[-mcpu=processor[+extension...]]
[-march=architecture[+extension...]]
[-mfpu=floating-point-format]
[-mfloat-abi=abi]
[-meabi=ver]
[-mthumb]
[-EB|-EL]
[-mapcs-32|-mapcs-26|-mapcs-float|
-mapcs-reentrant]
[-mthumb-interwork] [-k]
Target CRIS options:
[--underscore | --no-underscore]
[--pic] [-N]
[--emulation=criself | --emulation=crisaout]
[--march=v0_v10 | --march=v10 | --march=v32 | --march=common_v10_v32]
Target D10V options:
[-O]
Target D30V options:
[-O|-n|-N]
Target i386 options:
[--32|--64] [-n]
Target i960 options:
[-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
-AKC|-AMC]
[-b] [-no-relax]
Target IA-64 options:
[-mconstant-gp|-mauto-pic]
[-milp32|-milp64|-mlp64|-mp64]
[-mle|mbe]
[-mtune=itanium1|-mtune=itanium2]
[-munwind-check=warning|-munwind-check=error]
[-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
[-x|-xexplicit] [-xauto] [-xdebug]
Target IP2K options:
[-mip2022|-mip2022ext]
Target M32R options:
[--m32rx|--[no-]warn-explicit-parallel-conflicts|
--W[n]p]
Target M680X0 options:
[-l] [-m68000|-m68010|-m68020|...]
Target M68HC11 options:
[-m68hc11|-m68hc12|-m68hcs12]
[-mshort|-mlong]
[-mshort-double|-mlong-double]
[--force-long-branchs] [--short-branchs]
[--strict-direct-mode] [--print-insn-syntax]
[--print-opcodes] [--generate-example]
Target MCORE options:
[-jsri2bsr] [-sifilter] [-relax]
[-mcpu=[210|340]]
Target MIPS options:
[-nocpp] [-EL] [-EB] [-O[optimization level]]
[-g[debug level]] [-G num] [-KPIC] [-call_shared]
[-non_shared] [-xgot]
[-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
[-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
[-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
[-mips64] [-mips64r2]
[-construct-floats] [-no-construct-floats]
[-trap] [-no-break] [-break] [-no-trap]
[-mfix7000] [-mno-fix7000]
[-mips16] [-no-mips16]
[-mips3d] [-no-mips3d]
[-mdmx] [-no-mdmx]
[-mdebug] [-no-mdebug]
[-mpdr] [-mno-pdr]
Target MMIX options:
[--fixed-special-register-names] [--globalize-symbols]
[--gnu-syntax] [--relax] [--no-predefined-symbols]
[--no-expand] [--no-merge-gregs] [-x]
[--linker-allocated-gregs]
Target PDP11 options:
[-mpic|-mno-pic] [-mall] [-mno-extensions]
[-mextension|-mno-extension]
[-mcpu] [-mmachine]
Target picoJava options:
[-mb|-me]
Target PowerPC options:
[-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
-m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke|
-mbooke32|-mbooke64]
[-mcom|-many|-maltivec] [-memb]
[-mregnames|-mno-regnames]
[-mrelocatable|-mrelocatable-lib]
[-mlittle|-mlittle-endian|-mbig|-mbig-endian]
[-msolaris|-mno-solaris]
Target SPARC options:
[-Av6|-Av7|-Av8|-Asparclet|-Asparclite
-Av8plus|-Av8plusa|-Av9|-Av9a]
[-xarch=v8plus|-xarch=v8plusa] [-bump]
[-32|-64]
Target TIC54X options:
[-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
[-merrors-to-file <filename>|-me <filename>]
Target Xtensa options:
[--[no-]text-section-literals] [--[no-]absolute-literals]
[--[no-]target-align] [--[no-]longcalls]
[--[no-]transform]
[--rename-section oldname=newname]
-a[cdhlmns]-ac-ad-ah-al-am-an-as=fileYou may combine these options; for example, use `-aln' for assembly
listing without forms processing. The `=file' option, if used, must be
the last one. By itself, `-a' defaults to `-ahls'.
--alternate.altmacro.
-D--defsym sym=value-f-g--gen-debug--gstabs--gstabs+--gdwarf-2--help--target-help-I dir.include directives.
-J-K-L--keep-locals--listing-lhs-width=number--listing-lhs-width2=number--listing-rhs-width=number--listing-cont-lines=number-o objfile-RSet the default size of GAS's hash tables to a prime number close to
number. Increasing this value can reduce the length of time it takes the
assembler to perform its tasks, at the expense of increasing the assembler's
memory requirements. Similarly reducing this value can reduce the memory
requirements at the expense of speed.
--reduce-memory-overheads--statistics--strip-local-absolute-v-version--version-W--no-warn--fatal-warnings--warn-w-x-Z-- | files ...The following options are available when as is configured for an ARC processor.
-marc[5|6|7|8]-EB | -ELThe following options are available when as is configured for the ARM processor family.
-mcpu=processor[+extension...]-march=architecture[+extension...]-mfpu=floating-point-format-mfloat-abi=abi-mthumb-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant-EB | -EL-mthumb-interwork-kSee the info pages for documentation of the CRIS-specific options.
The following options are available when as is configured for a D10V processor.
-OThe following options are available when as is configured for a D30V processor.
-O-n-NThe following options are available when as is configured for the Intel 80960 processor.
-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC-b-no-relaxThe following options are available when as is configured for the Ubicom IP2K series.
-mip2022ext-mip2022The following options are available when as is configured for the Renesas M32R (formerly Mitsubishi M32R) series.
--m32rx--warn-explicit-parallel-conflicts or --Wp--no-warn-explicit-parallel-conflicts or --WnpThe following options are available when as is configured for the Motorola 68000 series.
-l-m68000 | -m68008 | -m68010 | -m68020 | -m68030| -m68040 | -m68060 | -m68302 | -m68331 | -m68332| -m68333 | -m68340 | -mcpu32 | -m5200-m68881 | -m68882 | -mno-68881 | -mno-68882-m68851 | -mno-68851For details about the PDP-11 machine dependent features options, see PDP-11-Options.
-mpic | -mno-pic-mall-mall-extensions-mno-extensions-mextension | -mno-extension-mcpu-mmachineThe following options are available when as is configured for a picoJava processor.
The following options are available when as is configured for the Motorola 68HC11 or 68HC12 series.
-m68hc11 | -m68hc12 | -m68hcs12-mshort-mlong-mshort-double-mlong-double--force-long-branchs-S | --short-branchs--strict-direct-mode--print-insn-syntax--print-opcodes--generate-exampleThe following options are available when as is configured for the SPARC architecture:
-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite-Av8plus | -Av8plusa | -Av9 | -Av9a`-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9' and `-Av9a' select a 64 bit environment.
`-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
UltraSPARC extensions.
-xarch=v8plus | -xarch=v8plusa-bumpThe following options are available when as is configured for the 'c54x architecture.
-mfar-mode-mcpu=CPU_VERSION-merrors-to-file FILENAMEThe following options are available when as is configured for a mips processor.
-G numgp register. It is only accepted for targets that
use ECOFF format, such as a DECstation running Ultrix. The default value is 8.
-EB-EL-mips1-mips2-mips3-mips4-mips5-mips32-mips32r2-mips64-mips64r2-march=CPU-mtune=cpu-mfix7000-mno-fix7000-mdebug-no-mdebug-mpdr-mno-pdr.pdr sections.
-mgp32-mfp32-mips16-no-mips16.set mips16 at the start of the assembly file. `-no-mips16'
turns off this option.
-mips3d-no-mips3d-mdmx-no-mdmx--construct-floats--no-construct-floats--emulation=nameThis option is currently supported only when the primary target as is configured for is a mips ELF or ECOFF target. Furthermore, the primary target or others specified with `--enable-targets=...' at configuration time must include support for the other format, if both are to be available. For example, the Irix 5 configuration includes support for both.
Eventually, this option will support more configurations, with more
fine-grained control over the assembler's behavior, and will be supported for
more processors.
-nocpp--trap--no-trap--break--no-break-nThe following options are available when as is configured for an MCore processor.
-jsri2bsr-nojsri2bsr-sifilter-nosifilter-relax-mcpu=[210|340]-EB-ELSee the info pages for documentation of the MMIX-specific options.
The following options are available when as is configured for an Xtensa processor.
--text-section-literals | --no-text-section-literalsL32R instructions; literals for
absolute mode L32R instructions are handled separately.
--absolute-literals | --no-absolute-literalsL32R instructions use absolute
or PC-relative addressing. The default is to assume absolute addressing
if the Xtensa processor includes the absolute L32R addressing
option. Otherwise, only the PC-relative L32R mode can be used.
--target-align | --no-target-align--longcalls | --no-longcalls--transform | --no-transformThis manual is intended to describe what you need to know to use gnu as. We cover the syntax expected in source files, including notation for symbols, constants, and expressions; the directives that as understands; and of course how to invoke as.
This manual also describes some of the machine-dependent features of various flavors of the assembler.
On the other hand, this manual is not intended as an introduction to programming in assembly language—let alone programming in general! In a similar vein, we make no attempt to introduce the machine architecture; we do not describe the instruction set, standard mnemonics, registers or addressing modes that are standard to a particular architecture. You may want to consult the manufacturer's machine architecture manual for this information.
gnu as is really a family of assemblers. If you use (or have used) the gnu assembler on one architecture, you should find a fairly similar environment when you use it on another architecture. Each version has much in common with the others, including object file formats, most assembler directives (often called pseudo-ops) and assembler syntax.
as is primarily intended to assemble the output of the
gnu C compiler gcc for use by the linker
ld. Nevertheless, we've tried to make as
assemble correctly everything that other assemblers for the same
machine would assemble.
Any exceptions are documented explicitly (see Machine Dependencies).
This doesn't mean as always uses the same syntax as another
assembler for the same architecture; for example, we know of several
incompatible versions of 680x0 assembly language syntax.
Unlike older assemblers, as is designed to assemble a source
program in one pass of the source file. This has a subtle impact on the
.org directive (see .org).
The gnu assembler can be configured to produce several alternative object file formats. For the most part, this does not affect how you write assembly language programs; but directives for debugging symbols are typically different in different file formats. See Symbol Attributes.
After the program name as, the command line may contain options and file names. Options may appear in any order, and may be before, after, or between file names. The order of file names is significant.
-- (two hyphens) by itself names the standard input file explicitly, as one of the files for as to assemble.
Except for `--' any command line argument that begins with a hyphen (`-') is an option. Each option changes the behavior of as. No option changes the way another option works. An option is a `-' followed by one or more letters; the case of the letter is important. All options are optional.
Some options expect exactly one file name to follow them. The file name may either immediately follow the option's letter (compatible with older assemblers) or it may be the next command argument (gnu standard). These two command lines are equivalent:
as -o my-object-file.o mumble.s
as -omy-object-file.o mumble.s
We use the phrase source program, abbreviated source, to describe the program input to one run of as. The program may be in one or more files; how the source is partitioned into files doesn't change the meaning of the source.
The source program is a concatenation of the text in all the files, in the order specified.
Each time you run as it assembles exactly one source program. The source program is made up of one or more files. (The standard input is also a file.)
You give as a command line that has zero or more input file names. The input files are read (from left file name to right). A command line argument (in any position) that has no special meaning is taken to be an input file name.
If you give as no file names it attempts to read one input file from the as standard input, which is normally your terminal. You may have to type <ctl-D> to tell as there is no more program to assemble.
Use `--' if you need to explicitly name the standard input file in your command line.
If the source is empty, as produces a small, empty object file.
There are two ways of locating a line in the input file (or files) and either may be used in reporting error messages. One way refers to a line number in a physical file; the other refers to a line number in a “logical” file. See Error and Warning Messages.
Physical files are those files named in the command line given to as.
Logical files are simply names declared explicitly by assembler
directives; they bear no relation to physical files. Logical file names help
error messages reflect the original source file, when as source
is itself synthesized from other files. as understands the
`#' directives emitted by the gcc preprocessor. See also
.file.
Every time you run as it produces an output file, which is
your assembly language program translated into numbers. This file
is the object file. Its default name is
a.out, or
b.out when as is configured for the Intel 80960.
You can give it another name by using the -o option. Conventionally,
object file names end with .o. The default name is used for historical
reasons: older assemblers were capable of assembling self-contained programs
directly into a runnable program. (For some formats, this isn't currently
possible, but it can be done for the a.out format.)
The object file is meant for input to the linker ld. It contains
assembled program code, information to help ld integrate
the assembled program into a runnable file, and (optionally) symbolic
information for the debugger.
as may write warnings and error messages to the standard error file (usually your terminal). This should not happen when a compiler runs as automatically. Warnings report an assumption made so that as could keep assembling a flawed program; errors report a grave problem that stops the assembly.
Warning messages have the format
file_name:NNN:Warning Message Text
(where NNN is a line number). If a logical file name has been given
(see .file) it is used for the filename, otherwise the name of
the current input file is used. If a logical line number was given
(see .line)
then it is used to calculate the number printed,
otherwise the actual line in the current source file is printed. The
message text is intended to be self explanatory (in the grand Unix
tradition).
Error messages have the format
file_name:NNN:FATAL:Error Message Text
The file name and line number are derived as for warning messages. The actual message text may be rather less explanatory because many of them aren't supposed to happen.
This chapter describes command-line options available in all versions of the gnu assembler; see Machine Dependencies, for options specific to particular machine architectures.
If you are invoking as via the gnu C compiler, you can use the `-Wa' option to pass arguments through to the assembler. The assembler arguments must be separated from each other (and the `-Wa') by commas. For example:
gcc -c -g -O -Wa,-alh,-L file.c
This passes two options to the assembler: `-alh' (emit a listing to standard output with high-level and assembly source) and `-L' (retain local symbols in the symbol table).
Usually you do not need to use this `-Wa' mechanism, since many compiler command-line options are automatically passed to the assembler by the compiler. (You can call the gnu compiler driver with the `-v' option to see precisely what options it passes to each compilation pass, including the assembler.)
These options enable listing output from the assembler. By itself, `-a' requests high-level, assembly, and symbols listing. You can use other letters to select specific options for the list: `-ah' requests a high-level language listing, `-al' requests an output-program assembly listing, and `-as' requests a symbol table listing. High-level listings require that a compiler debugging option like `-g' be used, and that assembly listings (`-al') be requested also.
Use the `-ac' option to omit false conditionals from a listing. Any lines
which are not assembled because of a false .if (or .ifdef, or any
other conditional), or a true .if followed by an .else, will be
omitted from the listing.
Use the `-ad' option to omit debugging directives from the listing.
Once you have specified one of these options, you can further control
listing output and its appearance using the directives .list,
.nolist, .psize, .eject, .title, and
.sbttl.
The `-an' option turns off all forms processing.
If you do not request listing output with one of the `-a' options, the
listing-control directives have no effect.
The letters after `-a' may be combined into one option, e.g., `-aln'.
Note if the assembler source is coming from the standard input (eg because it
is being created by gcc and the `-pipe' command line switch
is being used) then the listing will not contain any comments or preprocessor
directives. This is because the listing code buffers input source lines from
stdin only after they have been preprocessed by the assembler. This reduces
memory usage and makes the code more efficient.
Begin in alternate macro mode, see .altmacro.
This option has no effect whatsoever, but it is accepted to make it more likely that scripts written for other assemblers also work with as.
`-f' should only be used when assembling programs written by a (trusted) compiler. `-f' stops the assembler from doing whitespace and comment preprocessing on the input file(s) before assembling them. See Preprocessing.
Warning: if you use `-f' when the files actually need to be preprocessed (if they contain comments, for example), as does not work correctly.
.include Search Path: -I pathUse this option to add a path to the list of directories
as searches for files specified in .include
directives (see .include). You may use -I as
many times as necessary to include a variety of paths. The current
working directory is always searched first; after that, as
searches any `-I' directories in the same order as they were
specified (left to right) on the command line.
as sometimes alters the code emitted for directives of the form
`.word sym1-sym2'; see .word.
You can use the `-K' option if you want a warning issued when this
is done.
Labels beginning with `L' (upper case only) are called local
labels. See Symbol Names. Normally you do not see such labels when
debugging, because they are intended for the use of programs (like
compilers) that compose assembler programs, not for your notice.
Normally both as and ld discard such labels, so you do not
normally debug with them.
This option tells as to retain those `L...' symbols
in the object file. Usually if you do this you also tell the linker
ld to preserve symbols whose names begin with `L'.
By default, a local label is any label beginning with `L', but each target is allowed to redefine the local label prefix. On the HPPA local labels begin with `L$'.
The listing feature of the assembler can be enabled via the command line switch `-a' (see a). This feature combines the input source file(s) with a hex dump of the corresponding locations in the output object file, and displays them as a listing file. The format of this listing can be controlled by pseudo ops inside the assembler source (see List see Title see Sbttl see Psize see Eject) and also by the following switches:
--listing-lhs-width=`number'--listing-lhs-width2=`number'--listing-rhs-width=`number'--listing-cont-lines=`number'The -M or --mri option selects MRI compatibility mode. This
changes the syntax and pseudo-op handling of as to make it
compatible with the ASM68K or the ASM960 (depending upon the
configured target) assembler from Microtec Research. The exact nature of the
MRI syntax will not be documented here; see the MRI manuals for more
information. Note in particular that the handling of macros and macro
arguments is somewhat different. The purpose of this option is to permit
assembling existing MRI assembler code using as.
The MRI compatibility is not complete. Certain operations of the MRI assembler depend upon its object file format, and can not be supported using other object file formats. Supporting these would require enhancing each object file format individually. These are:
The m68k MRI assembler supports common sections which are merged by the linker. Other object file formats do not support this. as handles common sections by treating them as a single common symbol. It permits local symbols to be defined within a common section, but it can not support global symbols, since it has no way to describe them.
The MRI assemblers support relocations against a negated section address, and relocations which combine the start addresses of two or more sections. These are not support by other object file formats.
END pseudo-op specifying start address
The MRI END pseudo-op permits the specification of a start address.
This is not supported by other object file formats. The start address may
instead be specified using the -e option to the linker, or in a linker
script.
IDNT, .ident and NAME pseudo-ops
The MRI IDNT, .ident and NAME pseudo-ops assign a module
name to the output file. This is not supported by other object file formats.
ORG pseudo-op
The m68k MRI ORG pseudo-op begins an absolute section at a given
address. This differs from the usual as .org pseudo-op,
which changes the location within the current section. Absolute sections are
not supported by other object file formats. The address of a section may be
assigned within a linker script.
There are some other features of the MRI assembler which are not supported by as, typically either because they are difficult or because they seem of little consequence. Some of these may be supported in future releases.
EBCDIC strings are not supported.
Packed binary coded decimal is not supported. This means that the DC.P
and DCB.P pseudo-ops are not supported.
FEQU pseudo-op
The m68k FEQU pseudo-op is not supported.
NOOBJ pseudo-op
The m68k NOOBJ pseudo-op is not supported.
OPT branch control options
The m68k OPT branch control options—B, BRS, BRB,
BRL, and BRW—are ignored. as automatically
relaxes all branches, whether forward or backward, to an appropriate size, so
these options serve no purpose.
OPT list control options
The following m68k OPT list control options are ignored: C,
CEX, CL, CRE, E, G, I, M,
MEX, MC, MD, X.
OPT options
The following m68k OPT options are ignored: NEST, O,
OLD, OP, P, PCO, PCR, PCS, R.
OPT D option is default
The m68k OPT D option is the default, unlike the MRI assembler.
OPT NOD may be used to turn it off.
XREF pseudo-op.
The m68k XREF pseudo-op is ignored.
.debug pseudo-op
The i960 .debug pseudo-op is not supported.
.extended pseudo-op
The i960 .extended pseudo-op is not supported.
.list pseudo-op.
The various options of the i960 .list pseudo-op are not supported.
.optimize pseudo-op
The i960 .optimize pseudo-op is not supported.
.output pseudo-op
The i960 .output pseudo-op is not supported.
.setreal pseudo-op
The i960 .setreal pseudo-op is not supported.
as can generate a dependency file for the file it creates. This
file consists of a single rule suitable for make describing the
dependencies of the main source file.
The rule is written to the file named in its argument.
This feature is used in the automatic updating of makefiles.
There is always one object file output when you run as. By default it has the name a.out (or b.out, for Intel 960 targets only). You use this option (which takes exactly one filename) to give the object file a different name.
Whatever the object file is called, as overwrites any existing file of the same name.
-R tells as to write the object file as if all data-section data lives in the text section. This is only done at the very last moment: your binary data are the same, but data section parts are relocated differently. The data section part of your object file is zero bytes long because all its bytes are appended to the text section. (See Sections and Relocation.)
When you specify -R it would be possible to generate shorter address displacements (because we do not have to cross between text and data section). We refrain from doing this simply for compatibility with older versions of as. In future, -R may work this way.
When as is configured for COFF or ELF output, this option is only useful if you use sections named `.text' and `.data'.
-R is not supported for any of the HPPA targets. Using -R generates a warning from as.
Use `--statistics' to display two statistics about the resources used by as: the maximum amount of space allocated during the assembly (in bytes), and the total execution time taken for the assembly (in cpu seconds).
For some targets, the output of as is different in some ways from the output of some existing assembler. This switch requests as to use the traditional format instead.
For example, it disables the exception frame optimizations which
as normally does by default on gcc output.
You can find out what version of as is running by including the option `-v' (which you can also spell as `-version') on the command line.
as should never give a warning or error message when assembling compiler output. But programs written by people often cause as to give a warning that a particular assumption was made. All such warnings are directed to the standard error file.
If you use the -W and --no-warn options, no warnings are issued. This only affects the warning messages: it does not change any particular of how as assembles your file. Errors, which stop the assembly, are still reported.
If you use the --fatal-warnings option, as considers files that generate warnings to be in error.
You can switch these options off again by specifying --warn, which causes warnings to be output as usual.
After an error message, as normally produces no output. If for some reason you are interested in object file output even after as gives an error message on your program, use the `-Z' option. If there are any errors, as continues anyways, and writes an object file after a final warning message of the form `n errors, m warnings, generating bad object file.'
This chapter describes the machine-independent syntax allowed in a source file. as syntax is similar to what many other assemblers use; it is inspired by the BSD 4.2 assembler, except that as does not assemble Vax bit-fields.
It does not do macro processing, include file handling, or
anything else you may get from your C compiler's preprocessor. You can
do include file processing with the .include directive
(see .include). You can use the gnu C compiler driver
to get other “CPP” style preprocessing by giving the input file a
`.S' suffix. See Options Controlling the Kind of Output.
Excess whitespace, comments, and character constants cannot be used in the portions of the input text that are not preprocessed.
If the first line of an input file is #NO_APP or if you use the
`-f' option, whitespace and comments are not removed from the input file.
Within an input file, you can ask for whitespace and comment removal in
specific portions of the by putting a line that says #APP before the
text that may contain whitespace or comments, and putting a line that says
#NO_APP after this text. This feature is mainly intend to support
asm statements in compilers whose output is otherwise free of comments
and whitespace.
Whitespace is one or more blanks or tabs, in any order. Whitespace is used to separate symbols, and to make programs neater for people to read. Unless within character constants (see Character Constants), any whitespace means the same as exactly one space.
There are two ways of rendering comments to as. In both cases the comment is equivalent to one space.
Anything from `/*' through the next `*/' is a comment. This means you may not nest these comments.
/*
The only way to include a newline ('\n') in a comment
is to use this sort of comment.
*/
/* This sort of comment does not nest. */
Anything from the line comment character to the next newline is considered a comment and is ignored. The line comment character is `;' for the AMD 29K family; `;' on the ARC; `@' on the ARM; `;' for the H8/300 family; `!' for the H8/500 family; `;' for the HPPA; `#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH; `!' on the SPARC; `#' on the ip2k; `#' on the m32r; `|' on the 680x0; `#' on the 68HC11 and 68HC12; `;' on the M880x0; `#' on the Vax; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems; see Machine Dependencies.
On some machines there are two different line comment characters. One character only begins a comment if it is the first non-whitespace character on a line, while the other always begins a comment.
The V850 assembler also supports a double dash as starting a comment that extends to the end of the line.
`--';
To be compatible with past assemblers, lines that begin with `#' have a special interpretation. Following the `#' should be an absolute expression (see Expressions): the logical line number of the next line. Then a string (see Strings) is allowed: if present it is a new logical file name. The rest of the line, if any, should be whitespace.
If the first non-whitespace characters on the line are not numeric, the line is ignored. (Just like a comment.)
# This is an ordinary comment.
# 42-6 "new_file_name" # New logical file name
# This is logical line # 36.
This feature is deprecated, and may disappear from future versions of as.
A symbol is one or more characters chosen from the set of all
letters (both upper and lower case), digits and the three characters
`_.$'.
On most machines, you can also use $ in symbol names; exceptions
are noted in Machine Dependencies.
No symbol may begin with a digit. Case is significant.
There is no length limit: all characters are significant. Symbols are
delimited by characters not in that set, or by the beginning of a file
(since the source program must end with a newline, the end of a file is
not a possible symbol delimiter). See Symbols.
A statement ends at a newline character (`\n') or line separator character. (The line separator is usually `;', unless this conflicts with the comment character; see Machine Dependencies.) The newline or separator character is considered part of the preceding statement. Newlines and separators within character constants are an exception: they do not end statements.
It is an error to end any statement with end-of-file: the last character of any input file should be a newline.
An empty statement is allowed, and may include whitespace. It is ignored.
A statement begins with zero or more labels, optionally followed by a key symbol which determines what kind of statement it is. The key symbol determines the syntax of the rest of the statement. If the symbol begins with a dot `.' then the statement is an assembler directive: typically valid for any computer. If the symbol begins with a letter the statement is an assembly language instruction: it assembles into a machine language instruction. Different versions of as for different computers recognize different instructions. In fact, the same symbol may represent a different instruction in a different computer's assembly language.
A label is a symbol immediately followed by a colon (:).
Whitespace before a label or after a colon is permitted, but you may not
have whitespace between a label's symbol and its colon. See Labels.
For HPPA targets, labels need not be immediately followed by a colon, but the definition of a label must begin in column zero. This also implies that only one label may be defined on each line.
label: .directive followed by something
another_label: # This is an empty statement.
instruction operand_1, operand_2, ...
A constant is a number, written so that its value is known by inspection, without knowing any context. Like this:
.byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
.ascii "Ring the bell\7" # A string constant.
.octa 0x123456789abcdef0123456789ABCDEF0 # A bignum.
.float 0f-314159265358979323846264338327\
95028841971.693993751E-40 # - pi, a flonum.
There are two kinds of character constants. A character stands for one character in one byte and its value may be used in numeric expressions. String constants (properly called string literals) are potentially many bytes and their values may not be used in arithmetic expressions.
A string is written between double-quotes. It may contain
double-quotes or null characters. The way to get special characters
into a string is to escape these characters: precede them with
a backslash `\' character. For example `\\' represents
one backslash: the first \ is an escape which tells
as to interpret the second character literally as a backslash
(which prevents as from recognizing the second \ as an
escape character). The complete list of escapes follows.
\008 has the value 010, and \009 the value 011.
x hex-digits...x works.
Which characters are escapable, and what those escapes represent, varies widely among assemblers. The current set is what we think the BSD 4.2 assembler recognizes, and is a subset of what most C compilers recognize. If you are in doubt, do not use an escape sequence.
A single character may be written as a single quote immediately
followed by that character. The same escapes apply to characters as
to strings. So if you want to write the character backslash, you
must write '\\ where the first \ escapes the second
\. As you can see, the quote is an acute accent, not a
grave accent. A newline
immediately following an acute accent is taken as a literal character
and does not count as the end of a statement. The value of a character
constant in a numeric expression is the machine's byte-wide code for
that character. as assumes your character code is ASCII:
'A means 65, 'B means 66, and so on.
as distinguishes three kinds of numbers according to how they
are stored in the target machine. Integers are numbers that
would fit into an int in the C language. Bignums are
integers, but they are stored in more than 32 bits. Flonums
are floating point numbers, described below.
A binary integer is `0b' or `0B' followed by zero or more of the binary digits `01'.
An octal integer is `0' followed by zero or more of the octal digits (`01234567').
A decimal integer starts with a non-zero digit followed by zero or more digits (`0123456789').
A hexadecimal integer is `0x' or `0X' followed by one or more hexadecimal digits chosen from `0123456789abcdefABCDEF'.
Integers have the usual values. To denote a negative integer, use the prefix operator `-' discussed under expressions (see Prefix Operators).
A bignum has the same syntax and semantics as an integer except that the number (or its negative) takes more than 32 bits to represent in binary. The distinction is made because in some places integers are permitted while bignums are not.
A flonum represents a floating point number. The translation is indirect: a decimal floating point number from the text is converted by as to a generic binary floating point number of more than sufficient precision. This generic floating point number is converted to a particular computer's floating point format (or formats) by a portion of as specialized to that computer.
A flonum is written by writing (in order)
On the H8/300, H8/500, Renesas / SuperH SH, and AMD 29K architectures, the letter must be one of the letters `DFPRSX' (in upper or lower case).
On the ARC, the letter must be one of the letters `DFRS' (in upper or lower case).
On the Intel 960 architecture, the letter must be one of the letters `DFT' (in upper or lower case).
On the HPPA architecture, the letter must be `E' (upper case only).
At least one of the integer part or the fractional part must be present. The floating point number has the usual base-10 value.
as does all processing using integers. Flonums are computed independently of any floating point hardware in the computer running as.
Roughly, a section is a range of addresses, with no gaps; all data “in” those addresses is treated the same for some particular purpose. For example there may be a “read only” section.
The linker ld reads many object files (partial programs) and
combines their contents to form a runnable program. When as
emits an object file, the partial program is assumed to start at address 0.
ld assigns the final addresses for the partial program, so that
different partial programs do not overlap. This is actually an
oversimplification, but it suffices to explain how as uses
sections.
ld moves blocks of bytes of your program to their run-time
addresses. These blocks slide to their run-time addresses as rigid
units; their length does not change and neither does the order of bytes
within them. Such a rigid unit is called a section. Assigning
run-time addresses to sections is called relocation. It includes
the task of adjusting mentions of object-file addresses so they refer to
the proper run-time addresses.
For the H8/300 and H8/500,
and for the Renesas / SuperH SH,
as pads sections if needed to
ensure they end on a word (sixteen bit) boundary.
An object file written by as has at least three sections, any of which may be empty. These are named text, data and bss sections.
When it generates COFF or ELF output,
as can also generate whatever other named sections you specify
using the `.section' directive (see .section).
If you do not use any directives that place output in the `.text'
or `.data' sections, these sections still exist, but are empty.
When as generates SOM or ELF output for the HPPA, as can also generate whatever other named sections you specify using the `.space' and `.subspace' directives. See HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) for details on the `.space' and `.subspace' assembler directives.
Additionally, as uses different names for the standard text, data, and bss sections when generating SOM output. Program text is placed into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
Within the object file, the text section starts at address 0, the
data section follows, and the bss section follows the data section.
When generating either SOM or ELF output files on the HPPA, the text
section starts at address 0, the data section at address
0x4000000, and the bss section follows the data section.
To let ld know which data changes when the sections are
relocated, and how to change that data, as also writes to the
object file details of the relocation needed. To perform relocation
ld must know, each time an address in the object
file is mentioned:
(address) − (start-address of section)?
In fact, every address as ever uses is expressed as
(section) + (offset into section)
Further, most expressions as computes have this section-relative nature. (For some object formats, such as SOM for the HPPA, some expressions are symbol-relative instead.)
In this manual we use the notation {secname N} to mean “offset N into section secname.”
Apart from text, data and bss sections you need to know about the
absolute section. When ld mixes partial programs,
addresses in the absolute section remain unchanged. For example, address
{absolute 0} is “relocated” to run-time address 0 by
ld. Although the linker never arranges two partial programs'
data sections with overlapping addresses after linking, by definition
their absolute sections must overlap. Address {absolute 239} in one
part of a program is always the same address when the program is running as
address {absolute 239} in any other part of the program.
The idea of sections is extended to the undefined section. Any address whose section is unknown at assembly time is by definition rendered {undefined U}—where U is filled in later. Since numbers are always defined, the only way to generate an undefined address is to mention an undefined symbol. A reference to a named common block would be such a symbol: its value is unknown at assembly time so it has section undefined.
By analogy the word section is used to describe groups of sections in
the linked program. ld puts all partial programs' text
sections in contiguous addresses in the linked program. It is
customary to refer to the text section of a program, meaning all
the addresses of all partial programs' text sections. Likewise for
data and bss sections.
Some sections are manipulated by ld; others are invented for
use of as and have no meaning except during assembly.
ld deals with just four kinds of sections, summarized below.
ld treat them as
separate but equal sections. Anything you can say of one section is
true of another.
When the program is running, however, it is
customary for the text section to be unalterable. The
text section is often shared among processes: it contains
instructions, constants and the like. The data section of a running
program is usually alterable: for example, C variables would be stored
in the data section.
ld must
not change when relocating. In this sense we speak of absolute
addresses being “unrelocatable”: they do not change during relocation.
An idealized example of three relocatable sections follows. The example uses the traditional section names `.text' and `.data'. Memory addresses are on the horizontal axis.
+-----+----+--+
partial program # 1: |ttttt|dddd|00|
+-----+----+--+
text data bss
seg. seg. seg.
+---+---+---+
partial program # 2: |TTT|DDD|000|
+---+---+---+
+--+---+-----+--+----+---+-----+~~
linked program: | |TTT|ttttt| |dddd|DDD|00000|
+--+---+-----+--+----+---+-----+~~
addresses: 0 ...
These sections are meant only for the internal use of as. They have no meaning at run-time. You do not really need to know about these sections for most purposes; but they can be mentioned in as warning messages, so it might be helpful to have an idea of their meanings to as. These sections are used to permit the value of every expression in your assembly language program to be a section-relative address.
Assembled bytes conventionally fall into two sections: text and data. You may have separate groups of data in named sections that you want to end up near to each other in the object file, even though they are not contiguous in the assembler source. as allows you to use subsections for this purpose. Within each section, there can be numbered subsections with values from 0 to 8192. Objects assembled into the same subsection go into the object file together with other objects in the same subsection. For example, a compiler might want to store constants in the text section, but might not want to have them interspersed with the program being assembled. In this case, the compiler could issue a `.text 0' before each section of code being output, and a `.text 1' before each group of constants being output.
Subsections are optional. If you do not use subsections, everything goes in subsection number zero.
Each subsection is zero-padded up to a multiple of four bytes. (Subsections may be padded a different amount on different flavors of as.)
Subsections appear in your object file in numeric order, lowest numbered
to highest. (All this to be compatible with other people's assemblers.)
The object file contains no representation of subsections; ld and
other programs that manipulate object files see no trace of them.
They just see all your text subsections as a text section, and all your
data subsections as a data section.
To specify which subsection you want subsequent statements assembled
into, use a numeric argument to specify it, in a `.text
expression' or a `.data expression' statement.
When generating COFF output, you
can also use an extra subsection
argument with arbitrary named sections: `.section name,
expression'.
When generating ELF output, you
can also use the .subsection directive (see SubSection)
to specify a subsection: `.subsection expression'.
Expression should be an absolute expression.
(See Expressions.) If you just say `.text' then `.text 0'
is assumed. Likewise `.data' means `.data 0'. Assembly
begins in text 0. For instance:
.text 0 # The default subsection is text 0 anyway.
.ascii "This lives in the first text subsection. *"
.text 1
.ascii "But this lives in the second text subsection."
.data 0
.ascii "This lives in the data section,"
.ascii "in the first data subsection."
.text 0
.ascii "This lives in the first text section,"
.ascii "immediately following the asterisk (*)."
Each section has a location counter incremented by one for every byte
assembled into that section. Because subsections are merely a convenience
restricted to as there is no concept of a subsection location
counter. There is no way to directly manipulate a location counter—but the
.align directive changes it, and any label definition captures its
current value. The location counter of the section where statements are being
assembled is said to be the active location counter.
The bss section is used for local common variable storage. You may allocate address space in the bss section, but you may not dictate data to load into it before your program executes. When your program starts running, all the contents of the bss section are zeroed bytes.
The .lcomm pseudo-op defines a symbol in the bss section; see
.lcomm.
The .comm pseudo-op may be used to declare a common symbol, which is
another form of uninitialized symbol; see See .comm.
When assembling for a target which supports multiple sections, such as ELF or
COFF, you may switch into the .bss section and define symbols as usual;
see .section. You may only assemble zero values into the
section. Typically the section will only contain symbol definitions and
.skip directives (see .skip).
Symbols are a central concept: the programmer uses symbols to name things, the linker uses symbols to link, and the debugger uses symbols to debug.
Warning: as does not place symbols in the object file in the same order they were declared. This may break some debuggers.
A label is written as a symbol immediately followed by a colon `:'. The symbol then represents the current value of the active location counter, and is, for example, a suitable instruction operand. You are warned if you use the same symbol to represent two different locations: the first definition overrides any other definitions.
On the HPPA, the usual form for a label need not be immediately followed by a
colon, but instead must start in column zero. Only one label may be defined on
a single line. To work around this, the HPPA version of as also
provides a special directive .label for defining labels more flexibly.
A symbol can be given an arbitrary value by writing a symbol, followed
by an equals sign `=', followed by an expression
(see Expressions). This is equivalent to using the .set
directive. See .set.
Symbol names begin with a letter or with one of `._'. On most
machines, you can also use $ in symbol names; exceptions are
noted in Machine Dependencies. That character may be followed by any
string of digits, letters, dollar signs (unless otherwise noted in
Machine Dependencies), and underscores.
For the AMD 29K family, `?' is also allowed in the
body of a symbol name, though not at its beginning.
Case of letters is significant: foo is a different symbol name
than Foo.
Each symbol has exactly one name. Each name in an assembly language program refers to exactly one symbol. You may use that symbol name any number of times in a program.
Local symbols help compilers and programmers use names temporarily. They create symbols which are guaranteed to be unique over the entire scope of the input source code and which can be referred to by a simple notation. To define a local symbol, write a label of the form `N:' (where N represents any positive integer). To refer to the most recent previous definition of that symbol write `Nb', using the same number as when you defined the label. To refer to the next definition of a local label, write `Nf'— The `b' stands for“backwards” and the `f' stands for “forwards”.
There is no restriction on how you can use these labels, and you can reuse them too. So that it is possible to repeatedly define the same local label (using the same number `N'), although you can only refer to the most recently defined local label of that number (for a backwards reference) or the next definition of a specific local label for a forward reference. It is also worth noting that the first 10 local labels (`0:'...`9:') are implemented in a slightly more efficient manner than the others.
Here is an example:
1: branch 1f
2: branch 1b
1: branch 2f
2: branch 1b
Which is the equivalent of:
label_1: branch label_3
label_2: branch label_1
label_3: branch label_4
label_4: branch label_3
Local symbol names are only a notational device. They are immediately transformed into more conventional symbol names before the assembler uses them. The symbol names stored in the symbol table, appearing in error messages and optionally emitted to the object file. The names are constructed using these parts:
Lld forget symbols that start with `L'. These labels are
used for symbols you are never intended to see. If you use the
`-L' option then as retains these symbols in the
object file. If you also instruct ld to retain these symbols,
you may use them in debugging.
So for example, the first 1: is named L1C-B1, the 44th
3: is named L3C-B44.
as also supports an even more local form of local labels called
dollar labels. These labels go out of scope (ie they become undefined) as soon
as a non-local label is defined. Thus they remain valid for only a small
region of the input source code. Normal local labels, by contrast, remain in
scope for the entire file, or until they are redefined by another occurrence of
the same local label.
Dollar labels are defined in exactly the same way as ordinary local labels, except that instead of being terminated by a colon, they are terminated by a dollar sign. eg `55$'.
They can also be distinguished from ordinary local labels by their transformed name which uses ASCII character `\001' (control-A) as the magic character to distinguish them from ordinary labels. Thus the 5th defintion of `6$' is named `L6C-A5'.
The special symbol `.' refers to the current address that
as is assembling into. Thus, the expression `melvin:
.long .' defines melvin to contain its own address.
Assigning a value to . is treated the same as a .org
directive. Thus, the expression `.=.+4' is the same as saying
`.space 4'.
Every symbol has, as well as its name, the attributes “Value” and “Type”. Depending on output format, symbols can also have auxiliary attributes.
If you use a symbol without defining it, as assumes zero for all these attributes, and probably won't warn you. This makes the symbol an externally defined symbol, which is generally what you would want.
The value of a symbol is (usually) 32 bits. For a symbol which labels a
location in the text, data, bss or absolute sections the value is the
number of addresses from the start of that section to the label.
Naturally for text, data and bss sections the value of a symbol changes
as ld changes section base addresses during linking. Absolute
symbols' values do not change during linking: that is why they are
called absolute.
The value of an undefined symbol is treated in a special way. If it is
0 then the symbol is not defined in this assembler source file, and
ld tries to determine its value from other files linked into the
same program. You make this kind of symbol simply by mentioning a symbol
name without defining it. A non-zero value represents a .comm
common declaration. The value is how much common storage to reserve, in
bytes (addresses). The symbol refers to the first address of the
allocated storage.
The type attribute of a symbol contains relocation (section) information, any flag settings indicating that a symbol is external, and (optionally), other information for linkers and debuggers. The exact format depends on the object-code output format in use.
a.outThis is an arbitrary 16-bit value. You may establish a symbol's
descriptor value by using a .desc statement
(see .desc). A descriptor value means nothing to
as.
This is an arbitrary 8-bit value. It means nothing to as.
The COFF format supports a multitude of auxiliary symbol attributes;
like the primary symbol attributes, they are set between .def and
.endef directives.
The symbol name is set with .def; the value and type,
respectively, with .val and .type.
The as directives .dim, .line, .scl,
.size, .tag, and .weak can generate auxiliary symbol
table information for COFF.
The SOM format for the HPPA supports a multitude of symbol attributes set with
the .EXPORT and .IMPORT directives.
The attributes are described in HP9000 Series 800 Assembly
Language Reference Manual (HP 92432-90001) under the IMPORT and
EXPORT assembler directive documentation.
An expression specifies an address or numeric value. Whitespace may precede and/or follow an expression.
The result of an expression must be an absolute number, or else an offset into a particular section. If an expression is not absolute, and there is not enough information when as sees the expression to know its section, a second pass over the source program might be necessary to interpret the expression—but the second pass is currently not implemented. as aborts with an error message in this situation.
An empty expression has no value: it is just whitespace or null. Wherever an absolute expression is required, you may omit the expression, and as assumes a value of (absolute) 0. This is compatible with other assemblers.
An integer expression is one or more arguments delimited by operators.
Arguments are symbols, numbers or subexpressions. In other contexts arguments are sometimes called “arithmetic operands”. In this manual, to avoid confusing them with the “instruction operands” of the machine language, we use the term “argument” to refer to parts of expressions only, reserving the word “operand” to refer only to machine instruction operands.
Symbols are evaluated to yield {section NNN} where section is one of text, data, bss, absolute, or undefined. NNN is a signed, 2's complement 32 bit integer.
Numbers are usually integers.
A number can be a flonum or bignum. In this case, you are warned that only the low order 32 bits are used, and as pretends these 32 bits are an integer. You may write integer-manipulating instructions that act on exotic constants, compatible with other assemblers.
Subexpressions are a left parenthesis `(' followed by an integer expression, followed by a right parenthesis `)'; or a prefix operator followed by an argument.
Operators are arithmetic functions, like + or %. Prefix
operators are followed by an argument. Infix operators appear
between their arguments. Operators may be preceded and/or followed by
whitespace.
as has the following prefix operators. They each take one argument, which must be absolute.
-~Infix operators take two arguments, one on either side. Operators
have precedence, but operations with equal precedence are performed left
to right. Apart from + or -, both arguments must be
absolute, and the result is absolute.
*/%<<<>>>|&^!+-==<><>>=<=The comparison operators can be used as infix operators. A true results has a value of -1 whereas a false result has a value of 0. Note, these operators perform signed comparisons.
&&||These two logical operations can be used to combine the results of sub expressions. Note, unlike the comparison operators a true result returns a value of 1 but a false results does still return 0. Also note that the logical or operator has a slightly lower precedence than logical and.
In short, it's only meaningful to add or subtract the offsets in an address; you can only have a defined section in one of the two arguments.
All assembler directives have names that begin with a period (`.'). The rest of the name is letters, usually in lower case.
This chapter discusses directives that are available regardless of the target machine configuration for the gnu assembler. Some machine configurations provide additional directives. See Machine Dependencies.
.abortThis directive stops the assembly immediately. It is for
compatibility with other assemblers. The original idea was that the
assembly language source would be piped into the assembler. If the sender
of the source quit, it could use this directive tells as to
quit also. One day .abort will not be supported.
.ABORTWhen producing COFF output, as accepts this directive as a synonym for `.abort'.
When producing b.out output, as accepts this directive,
but ignores it.
.align abs-expr, abs-expr, abs-exprPad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment required, as described below.
The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.
The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.
The way the required alignment is specified varies from system to system. For the a29k, arc, hppa, i386 using ELF, i860, iq2000, m68k, m88k, or32, s390, sparc, tic4x, tic80 and xtensa, the first expression is the alignment request in bytes. For example `.align 8' advances the location counter until it is a multiple of 8. If the location counter is already a multiple of 8, no change is needed. For the tic54x, the first expression is the alignment request in words.
For other systems, including the i386 using a.out format, and the arm and strongarm, it is the number of low-order zero bits the location counter must have after advancement. For example `.align 3' advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.
This inconsistency is due to the different behaviors of the various
native assemblers for these systems which GAS must emulate.
GAS also provides .balign and .p2align directives,
described later, which have a consistent behavior across all
architectures (but are specific to GAS).
.ascii "string"....ascii expects zero or more string literals (see Strings)
separated by commas. It assembles each string (with no automatic
trailing zero byte) into consecutive addresses.
.asciz "string"....asciz is just like .ascii, but each string is followed by
a zero byte. The “z” in `.asciz' stands for “zero”.
.balign[wl] abs-expr, abs-expr, abs-exprPad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the alignment request in bytes. For example `.balign 8' advances the location counter until it is a multiple of 8. If the location counter is already a multiple of 8, no change is needed.
The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.
The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.
The .balignw and .balignl directives are variants of the
.balign directive. The .balignw directive treats the fill
pattern as a two byte word value. The .balignl directives treats the
fill pattern as a four byte longword value. For example, .balignw
4,0x368d will align to a multiple of 4. If it skips two bytes, they will be
filled in with the value 0x368d (the exact placement of the bytes depends upon
the endianness of the processor). If it skips 1 or 3 bytes, the fill value is
undefined.
.byte expressions.byte expects zero or more expressions, separated by commas.
Each expression is assembled into the next byte.
.comm symbol , length .comm declares a common symbol named symbol. When linking, a
common symbol in one object file may be merged with a defined or common symbol
of the same name in another object file. If ld does not see a
definition for the symbol–just one or more common symbols–then it will
allocate length bytes of uninitialized memory. length must be an
absolute expression. If ld sees multiple common symbols with
the same name, and they do not all have the same size, it will allocate space
using the largest size.
When using ELF, the .comm directive takes an optional third argument.
This is the desired alignment of the symbol, specified as a byte boundary (for
example, an alignment of 16 means that the least significant 4 bits of the
address should be zero). The alignment must be an absolute expression, and it
must be a power of two. If ld allocates uninitialized memory
for the common symbol, it will use the alignment when placing the symbol. If
no alignment is specified, as will set the alignment to the
largest power of two less than or equal to the size of the symbol, up to a
maximum of 16.
The syntax for .comm differs slightly on the HPPA. The syntax is
`symbol .comm, length'; symbol is optional.
.cfi_startproc.cfi_startproc is used at the beginning of each function that
should have an entry in .eh_frame. It initializes some internal
data structures and emits architecture dependent initial CFI instructions.
Don't forget to close the function by
.cfi_endproc.
.cfi_endproc.cfi_endproc is used at the end of a function where it closes its
unwind entry previously opened by
.cfi_startproc. and emits it to .eh_frame.
.cfi_def_cfa register, offset.cfi_def_cfa defines a rule for computing CFA as: take
address from register and add offset to it.
.cfi_def_cfa_register register.cfi_def_cfa_register modifies a rule for computing CFA. From
now on register will be used instead of the old one. Offset
remains the same.
.cfi_def_cfa_offset offset.cfi_def_cfa_offset modifies a rule for computing CFA. Register
remains the same, but offset is new. Note that it is the
absolute offset that will be added to a defined register to compute
CFA address.
.cfi_adjust_cfa_offset offsetSame as .cfi_def_cfa_offset but offset is a relative
value that is added/substracted from the previous offset.
.cfi_offset register, offsetPrevious value of register is saved at offset offset from CFA.
.cfi_rel_offset register, offsetPrevious value of register is saved at offset offset from
the current CFA register. This is transformed to .cfi_offset
using the known displacement of the CFA register from the CFA.
This is often easier to use, because the number will match the
code it's annotating.
.cfi_window_saveSPARC register window has been saved.
.cfi_escape expression[, ...]Allows the user to add arbitrary bytes to the unwind info. One might use this to add OS-specific CFI opcodes, or generic CFI opcodes that GAS does not yet support.
.data subsection.data tells as to assemble the following statements onto the
end of the data subsection numbered subsection (which is an
absolute expression). If subsection is omitted, it defaults
to zero.
.def nameBegin defining debugging information for a symbol name; the
definition extends until the .endef directive is encountered.
This directive is only observed when as is configured for COFF
format output; when producing b.out, `.def' is recognized,
but ignored.
.desc symbol, abs-expressionThis directive sets the descriptor of the symbol (see Symbol Attributes) to the low 16 bits of an absolute expression.
The `.desc' directive is not available when as is
configured for COFF output; it is only for a.out or b.out
object format. For the sake of compatibility, as accepts
it, but produces no output, when configured for COFF.
.dimThis directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
.def/.endef pairs.
`.dim' is only meaningful when generating COFF format output; when
as is generating b.out, it accepts this directive but
ignores it.
.double flonums.double expects zero or more flonums, separated by commas. It
assembles floating point numbers.
The exact kind of floating point numbers emitted depends on how
as is configured. See Machine Dependencies.
.ejectForce a page break at this point, when generating assembly listings.
.else.else is part of the as support for conditional
assembly; see .if. It marks the beginning of a section
of code to be assembled if the condition for the preceding .if
was false.
.elseif.elseif is part of the as support for conditional
assembly; see .if. It is shorthand for beginning a new
.if block that would otherwise fill the entire .else section.
.end.end marks the end of the assembly file. as does not
process anything in the file past the .end directive.
.endefThis directive flags the end of a symbol definition begun with
.def.
`.endef' is only meaningful when generating COFF format output; if
as is configured to generate b.out, it accepts this
directive but ignores it.
.endfunc.endfunc marks the end of a function specified with .func.
.endif.endif is part of the as support for conditional assembly;
it marks the end of a block of code that is only assembled
conditionally. See .if.
.equ symbol, expressionThis directive sets the value of symbol to expression.
It is synonymous with `.set'; see .set.
The syntax for equ on the HPPA is
`symbol .equ expression'.
.equiv symbol, expressionThe .equiv directive is like .equ and .set, except that
the assembler will signal an error if symbol is already defined. Note a
symbol which has been referenced but not actually defined is considered to be
undefined.
Except for the contents of the error message, this is roughly equivalent to
.ifdef SYM
.err
.endif
.equ SYM,VAL
.errIf as assembles a .err directive, it will print an error
message and, unless the -Z option was used, it will not generate an
object file. This can be used to signal error an conditionally compiled code.
.error "string"
Similarly to .err, this directive emits an error, but you can specify a
string that will be emitted as the error message. If you don't specify the
message, it defaults to ".error directive invoked in source file".
See Error and Warning Messages.
.error "This code has not been assembled and tested."
.exitmExit early from the current macro definition. See Macro.
.extern.extern is accepted in the source program—for compatibility
with other assemblers—but it is ignored. as treats
all undefined symbols as external.
.fail expressionGenerates an error or a warning. If the value of the expression is 500 or more, as will print a warning message. If the value is less than 500, as will print an error message. The message will include the value of expression. This can occasionally be useful inside complex nested macros or conditional assembly.
.file string.file tells as that we are about to start a new logical
file. string is the new file name. In general, the filename is
recognized whether or not it is surrounded by quotes `"'; but if you wish
to specify an empty file name, you must give the quotes–"". This
statement may go away in future: it is only recognized to be compatible with
old as programs.
In some configurations of as, .file has already been
removed to avoid conflicts with other assemblers. See Machine Dependencies.
.fill repeat , size , valuerepeat, size and value are absolute expressions. This emits repeat copies of size bytes. Repeat may be zero or more. Size may be zero or more, but if it is more than 8, then it is deemed to have the value 8, compatible with other people's assemblers. The contents of each repeat bytes is taken from an 8-byte number. The highest order 4 bytes are zero. The lowest order 4 bytes are value rendered in the byte-order of an integer on the computer as is assembling for. Each size bytes in a repetition is taken from the lowest order size bytes of this number. Again, this bizarre behavior is compatible with other people's assemblers.
size and value are optional. If the second comma and value are absent, value is assumed zero. If the first comma and following tokens are absent, size is assumed to be 1.
.float flonumsThis directive assembles zero or more flonums, separated by commas. It
has the same effect as .single.
The exact kind of floating point numbers emitted depends on how
as is configured.
See Machine Dependencies.
.func name[,label].func emits debugging information to denote function name, and
is ignored unless the file is assembled with debugging enabled.
Only `--gstabs[+]' is currently supported.
label is the entry point of the function and if omitted name
prepended with the `leading char' is used.
`leading char' is usually _ or nothing, depending on the target.
All functions are currently defined to have void return type.
The function must be terminated with .endfunc.
.global symbol, .globl symbol.global makes the symbol visible to ld. If you define
symbol in your partial program, its value is made available to
other partial programs that are linked with it. Otherwise,
symbol takes its attributes from a symbol of the same name
from another file linked into the same program.
Both spellings (`.globl' and `.global') are accepted, for compatibility with other assemblers.
On the HPPA, .global is not always enough to make it accessible to other
partial programs. You may need the HPPA-only .EXPORT directive as well.
See HPPA Assembler Directives.
.hidden namesThis is one of the ELF visibility directives. The other two are
.internal (see .internal) and
.protected (see .protected).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
hidden which means that the symbols are not visible to other components.
Such symbols are always considered to be protected as well.
.hword expressionsThis expects zero or more expressions, and emits a 16 bit number for each.
This directive is a synonym for `.short'; depending on the target architecture, it may also be a synonym for `.word'.
.identThis directive is used by some assemblers to place tags in object files. as simply accepts the directive for source-file compatibility with such assemblers, but does not actually emit anything for it.
.if absolute expression.if marks the beginning of a section of code which is only
considered part of the source program being assembled if the argument
(which must be an absolute expression) is non-zero. The end of
the conditional section of code must be marked by .endif
(see .endif); optionally, you may include code for the
alternative condition, flagged by .else (see .else).
If you have several conditions to check, .elseif may be used to avoid
nesting blocks if/else within each subsequent .else block.
The following variants of .if are also supported:
.ifdef symbol.ifb text.ifc string1,string2.ifeq absolute expression.ifeqs string1,string2.ifc. The strings must be quoted using double quotes.
.ifge absolute expression.ifgt absolute expression.ifle absolute expression.iflt absolute expression.ifnb text.ifb, but the sense of the test is reversed: this assembles the
following section of code if the operand is non-blank (non-empty).
.ifnc string1,string2..ifc, but the sense of the test is reversed: this assembles the
following section of code if the two strings are not the same.
.ifndef symbol.ifnotdef symbol.ifne absolute expression.if).
.ifnes string1,string2.ifeqs, but the sense of the test is reversed: this assembles the
following section of code if the two strings are not the same.
.incbin "file"[,skip[,count]]The incbin directive includes file verbatim at the current
location. You can control the search paths used with the `-I' command-line
option (see Command-Line Options). Quotation marks are required
around file.
The skip argument skips a number of bytes from the start of the
file. The count argument indicates the maximum number of bytes to
read. Note that the data is not aligned in any way, so it is the user's
responsibility to make sure that proper alignment is provided both before and
after the incbin directive.
.include "file"This directive provides a way to include supporting files at specified
points in your source program. The code from file is assembled as
if it followed the point of the .include; when the end of the
included file is reached, assembly of the original file continues. You
can control the search paths used with the `-I' command-line option
(see Command-Line Options). Quotation marks are required
around file.
.int expressionsExpect zero or more expressions, of any section, separated by commas. For each expression, emit a number that, at run time, is the value of that expression. The byte order and bit size of the number depends on what kind of target the assembly is for.
.internal namesThis is one of the ELF visibility directives. The other two are
.hidden (see .hidden) and
.protected (see .protected).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
internal which means that the symbols are considered to be hidden
(i.e., not visible to other components), and that some extra, processor specific
processing must also be performed upon the symbols as well.
.irp symbol,values...Evaluate a sequence of statements assigning different values to symbol.
The sequence of statements starts at the .irp directive, and is
terminated by an .endr directive. For each value, symbol is
set to value, and the sequence of statements is assembled. If no
value is listed, the sequence of statements is assembled once, with
symbol set to the null string. To refer to symbol within the
sequence of statements, use \symbol.
For example, assembling
.irp param,1,2,3
move d\param,sp@-
.endr
is equivalent to assembling
move d1,sp@-
move d2,sp@-
move d3,sp@-
For some caveats with the spelling of symbol, see also the discussion at See Macro.
.irpc symbol,values...Evaluate a sequence of statements assigning different values to symbol.
The sequence of statements starts at the .irpc directive, and is
terminated by an .endr directive. For each character in value,
symbol is set to the character, and the sequence of statements is
assembled. If no value is listed, the sequence of statements is
assembled once, with symbol set to the null string. To refer to
symbol within the sequence of statements, use \symbol.
For example, assembling
.irpc param,123
move d\param,sp@-
.endr
is equivalent to assembling
move d1,sp@-
move d2,sp@-
move d3,sp@-
For some caveats with the spelling of symbol, see also the discussion at See Macro.
.lcomm symbol , lengthReserve length (an absolute expression) bytes for a local common
denoted by symbol. The section and value of symbol are
those of the new local common. The addresses are allocated in the bss
section, so that at run-time the bytes start off zeroed. Symbol
is not declared global (see .global), so is normally
not visible to ld.
Some targets permit a third argument to be used with .lcomm. This
argument specifies the desired alignment of the symbol in the bss section.
The syntax for .lcomm differs slightly on the HPPA. The syntax is
`symbol .lcomm, length'; symbol is optional.
.lflagsas accepts this directive, for compatibility with other assemblers, but ignores it.
.line line-numberChange the logical line number. line-number must be an absolute expression. The next line has that logical line number. Therefore any other statements on the current line (after a statement separator character) are reported as on logical line number line-number − 1. One day as will no longer support this directive: it is recognized only for compatibility with existing assembler programs.
Warning: In the AMD29K configuration of as, this command is
not available; use the synonym .ln in that context.
Even though this is a directive associated with the a.out or
b.out object-code formats, as still recognizes it
when producing COFF output, and treats `.line' as though it
were the COFF `.ln' if it is found outside a
.def/.endef pair.
Inside a .def, `.line' is, instead, one of the directives
used by compilers to generate auxiliary symbol information for
debugging.
.linkonce [type]Mark the current section so that the linker only includes a single copy of it.
This may be used to include the same section in several different object files,
but ensure that the linker will only include it once in the final output file.
The .linkonce pseudo-op must be used for each instance of the section.
Duplicate sections are detected based on the section name, so it should be
unique.
This directive is only supported by a few object file formats; as of this writing, the only object file format which supports it is the Portable Executable format used on Windows NT.
The type argument is optional. If specified, it must be one of the following strings. For example:
.linkonce same_size
Not all types may be supported on all object file formats.
discardone_onlysame_sizesame_contents.ln line-number`.ln' is a synonym for `.line'.
.mri valIf val is non-zero, this tells as to enter MRI mode. If
val is zero, this tells as to exit MRI mode. This change
affects code assembled until the next .mri directive, or until the end
of the file. See MRI mode.
.listControl (in conjunction with the .nolist directive) whether or
not assembly listings are generated. These two directives maintain an
internal counter (which is zero initially). .list increments the
counter, and .nolist decrements it. Assembly listings are
generated whenever the counter is greater than zero.
By default, listings are disabled. When you enable them (with the `-a' command line option; see Command-Line Options), the initial value of the listing counter is one.
.long expressions.long is the same as `.int', see .int.
.macroThe commands .macro and .endm allow you to define macros that
generate assembly output. For example, this definition specifies a macro
sum that puts a sequence of numbers into memory:
.macro sum from=0, to=5
.long \from
.if \to-\from
sum "(\from+1)",\to
.endif
.endm
With that definition, `SUM 0,5' is equivalent to this assembly input:
.long 0
.long 1
.long 2
.long 3
.long 4
.long 5
.macro macname.macro macname macargs ...req'), or whether it takes all of the remaining arguments
(through `:vararg'). You can supply a default value for any
macro argument by following the name with `=deflt'. You
cannot define two macros with the same macname unless it has been
subject to the .purgem directive (See Purgem.) between the two
definitions. For example, these are all valid .macro statements:
.macro commcomm, which takes no
arguments.
.macro plus1 p, p1.macro plus1 p p1plus1,
which takes two arguments; within the macro definition, write
`\p' or `\p1' to evaluate the arguments.
.macro reserve_str p1=0 p2reserve_str, with two
arguments. The first argument has a default value, but not the second.
After the definition is complete, you can call the macro either as
`reserve_str a,b' (with `\p1' evaluating to
a and `\p2' evaluating to b), or as `reserve_str
,b' (with `\p1' evaluating as the default, in this case
`0', and `\p2' evaluating to b).
.macro m p1:req, p2=0, p3:varargm, with at least three
arguments. The first argument must always have a value specified, but
not the second, which instead has a default value. The third formal
will get assigned all remaining arguments specified at invocation time.
When you call a macro, you can specify the argument values either by position, or by keyword. For example, `sum 9,17' is equivalent to `sum to=17, from=9'.
Note that since each of the macargs can be an identifier exactly
as any other one permitted by the target architecture, there may be
occasional problems if the target hand-crafts special meanings to certain
characters when they occur in a special position. For example, if colon
(:) is generally permitted to be part of a symbol name, but the
architecture specific code special-cases it when occuring as the final
character of a symbol (to denote a label), then the macro parameter
replacement code will have no way of knowing that and consider the whole
construct (including the colon) an identifier, and check only this
identifier for being the subject to parameter substitution. In this
example, besides the potential of just separating identifier and colon
by white space, using alternate macro syntax (See Altmacro.) and
ampersand (&) as the character to separate literal text from macro
parameters (or macro parameters from one another) would provide a way to
achieve the same effect:
.altmacro
.macro label l
l&:
.endm
This applies identically to the identifiers used in .irp (See Irp.)
and .irpc (See Irpc.).
.endm.exitm\@LOCAL name [ , ... ]LOCAL is only available if you select “alternate
macro syntax” with `--alternate' or .altmacro.
See .altmacro.
.altmacroEnable alternate macro mode, enabling:
LOCAL name [ , ... ]LOCAL, is available. It is used to
generate a string replacement for each of the name arguments, and
replace any instances of name in each macro expansion. The
replacement string is unique in the assembly, and different for each
separate macro expansion. LOCAL allows you to write macros that
define symbols, without fear of conflict between separate macro expansions.
String delimiters"string":
'string'<string>single-character string escapeExpression results as strings.noaltmacroDisable alternate macro mode. Altmacro
.nolistControl (in conjunction with the .list directive) whether or
not assembly listings are generated. These two directives maintain an
internal counter (which is zero initially). .list increments the
counter, and .nolist decrements it. Assembly listings are
generated whenever the counter is greater than zero.
.octa bignumsThis directive expects zero or more bignums, separated by commas. For each bignum, it emits a 16-byte integer.
The term “octa” comes from contexts in which a “word” is two bytes; hence octa-word for 16 bytes.
.org new-lc , fillAdvance the location counter of the current section to
new-lc. new-lc is either an absolute expression or an
expression with the same section as the current subsection. That is,
you can't use .org to cross sections: if new-lc has the
wrong section, the .org directive is ignored. To be compatible
with former assemblers, if the section of new-lc is absolute,
as issues a warning, then pretends the section of new-lc
is the same as the current subsection.
.org may only increase the location counter, or leave it
unchanged; you cannot use .org to move the location counter
backwards.
Because as tries to assemble programs in one pass, new-lc may not be undefined. If you really detest this restriction we eagerly await a chance to share your improved assembler.
Beware that the origin is relative to the start of the section, not to the start of the subsection. This is compatible with other people's assemblers.
When the location counter (of the current subsection) is advanced, the intervening bytes are filled with fill which should be an absolute expression. If the comma and fill are omitted, fill defaults to zero.
.p2align[wl] abs-expr, abs-expr, abs-exprPad the location counter (in the current subsection) to a particular storage boundary. The first expression (which must be absolute) is the number of low-order zero bits the location counter must have after advancement. For example `.p2align 3' advances the location counter until it a multiple of 8. If the location counter is already a multiple of 8, no change is needed.
The second expression (also absolute) gives the fill value to be stored in the padding bytes. It (and the comma) may be omitted. If it is omitted, the padding bytes are normally zero. However, on some systems, if the section is marked as containing code and the fill value is omitted, the space is filled with no-op instructions.
The third expression is also absolute, and is also optional. If it is present, it is the maximum number of bytes that should be skipped by this alignment directive. If doing the alignment would require skipping more bytes than the specified maximum, then the alignment is not done at all. You can omit the fill value (the second argument) entirely by simply using two commas after the required alignment; this can be useful if you want the alignment to be filled with no-op instructions when appropriate.
The .p2alignw and .p2alignl directives are variants of the
.p2align directive. The .p2alignw directive treats the fill
pattern as a two byte word value. The .p2alignl directives treats the
fill pattern as a four byte longword value. For example, .p2alignw
2,0x368d will align to a multiple of 4. If it skips two bytes, they will be
filled in with the value 0x368d (the exact placement of the bytes depends upon
the endianness of the processor). If it skips 1 or 3 bytes, the fill value is
undefined.
.previousThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .subsection (see SubSection),
.pushsection (see PushSection), and .popsection
(see PopSection).
This directive swaps the current section (and subsection) with most recently
referenced section (and subsection) prior to this one. Multiple
.previous directives in a row will flip between two sections (and their
subsections).
In terms of the section stack, this directive swaps the current section with the top section on the section stack.
.popsectionThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .subsection (see SubSection),
.pushsection (see PushSection), and .previous
(see Previous).
This directive replaces the current section (and subsection) with the top section (and subsection) on the section stack. This section is popped off the stack.
.print stringas will print string on the standard output during assembly. You must put string in double quotes.
.protected namesThis is one of the ELF visibility directives. The other two are
.hidden (see Hidden) and .internal (see Internal).
This directive overrides the named symbols default visibility (which is set by
their binding: local, global or weak). The directive sets the visibility to
protected which means that any references to the symbols from within the
components that defines them must be resolved to the definition in that
component, even if a definition in another component would normally preempt
this.
.psize lines , columnsUse this directive to declare the number of lines—and, optionally, the number of columns—to use for each page, when generating listings.
If you do not use .psize, listings use a default line-count
of 60. You may omit the comma and columns specification; the
default width is 200 columns.
as generates formfeeds whenever the specified number of
lines is exceeded (or whenever you explicitly request one, using
.eject).
If you specify lines as 0, no formfeeds are generated save
those explicitly specified with .eject.
.purgem nameUndefine the macro name, so that later uses of the string will not be expanded. See Macro.
.pushsection name , subsectionThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .subsection (see SubSection),
.popsection (see PopSection), and .previous
(see Previous).
This directive pushes the current section (and subsection) onto the
top of the section stack, and then replaces the current section and
subsection with name and subsection.
.quad bignums.quad expects zero or more bignums, separated by commas. For
each bignum, it emits
an 8-byte integer. If the bignum won't fit in 8 bytes, it prints a
warning message; and just takes the lowest order 8 bytes of the bignum.
The term “quad” comes from contexts in which a “word” is two bytes;
hence quad-word for 8 bytes.
.rept countRepeat the sequence of lines between the .rept directive and the next
.endr directive count times.
For example, assembling
.rept 3
.long 0
.endr
is equivalent to assembling
.long 0
.long 0
.long 0
.sbttl "subheading"Use subheading as the title (third line, immediately after the title line) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.
.scl classSet the storage-class value for a symbol. This directive may only be
used inside a .def/.endef pair. Storage class may flag
whether a symbol is static or external, or it may record further
symbolic debugging information.
The `.scl' directive is primarily associated with COFF output; when
configured to generate b.out output format, as
accepts this directive but ignores it.
.section nameUse the .section directive to assemble the following code into a section
named name.
This directive is only supported for targets that actually support arbitrarily
named sections; on a.out targets, for example, it is not accepted, even
with a standard a.out section name.
For COFF targets, the .section directive is used in one of the following
ways:
.section name[, "flags"]
.section name[, subsegment]
If the optional argument is quoted, it is taken as flags to use for the section. Each flag is a single character. The following flags are recognized:
bnwdrxsaIf no flags are specified, the default flags depend upon the section name. If
the section name is not recognized, the default will be for the section to be
loaded and writable. Note the n and w flags remove attributes
from the section, rather than adding them, so if they are used on their own it
will be as if no flags had been specified at all.
If the optional argument to the .section directive is not quoted, it is
taken as a subsegment number (see Sub-Sections).
This is one of the ELF section stack manipulation directives. The others are
.subsection (see SubSection), .pushsection
(see PushSection), .popsection (see PopSection), and
.previous (see Previous).
For ELF targets, the .section directive is used like this:
.section name [, "flags"[, @type[,flag_specific_arguments]]
The optional flags argument is a quoted string which may contain any combination of the following characters:
awxMSGTThe optional type argument may contain one of the following constants:
@progbits@nobits@note@init_array@fini_array@preinit_arrayMany targets only support the first three section types.
Note on targets where the @ character is the start of a comment (eg
ARM) then another character is used instead. For example the ARM port uses the
% character.
If flags contains the M symbol then the type argument must
be specified as well as an extra argument - entsize - like this:
.section name , "flags"M, @type, entsize
Sections with the M flag but not S flag must contain fixed size
constants, each entsize octets long. Sections with both M and
S must contain zero terminated strings where each character is
entsize bytes long. The linker may remove duplicates within sections with
the same name, same entity size and same flags. entsize must be an
absolute expression.
If flags contains the G symbol then the type argument must
be present along with an additional field like this:
.section name , "flags"G, @type, GroupName[, linkage]
The GroupName field specifies the name of the section group to which this particular section belongs. The optional linkage field can contain:
comdat.gnu.linkonceNote - if both the M and G flags are present then the fields for the Merge flag should come first, like this:
.section name , "flags"MG, @type, entsize, GroupName[, linkage]
If no flags are specified, the default flags depend upon the section name. If the section name is not recognized, the default will be for the section to have none of the above flags: it will not be allocated in memory, nor writable, nor executable. The section will contain data.
For ELF targets, the assembler supports another type of .section
directive for compatibility with the Solaris assembler:
.section "name"[, flags...]
Note that the section name is quoted. There may be a sequence of comma separated flags:
#alloc#write#execinstr#tlsThis directive replaces the current section and subsection. See the
contents of the gas testsuite directory gas/testsuite/gas/elf for
some examples of how this directive and the other section stack directives
work.
.set symbol, expressionSet the value of symbol to expression. This changes symbol's value and type to conform to expression. If symbol was flagged as external, it remains flagged (see Symbol Attributes).
You may .set a symbol many times in the same assembly.
If you .set a global symbol, the value stored in the object
file is the last value stored into it.
The syntax for set on the HPPA is
`symbol .set expression'.
.short expressions.short is normally the same as `.word'.
See .word.
In some configurations, however, .short and .word generate
numbers of different lengths; see Machine Dependencies.
.single flonumsThis directive assembles zero or more flonums, separated by commas. It
has the same effect as .float.
The exact kind of floating point numbers emitted depends on how
as is configured. See Machine Dependencies.
.sizeThis directive is used to set the size associated with a symbol.
For COFF targets, the .size directive is only permitted inside
.def/.endef pairs. It is used like this:
.size expression
`.size' is only meaningful when generating COFF format output; when
as is generating b.out, it accepts this directive but
ignores it.
For ELF targets, the .size directive is used like this:
.size name , expression
This directive sets the size associated with a symbol name. The size in bytes is computed from expression which can make use of label arithmetic. This directive is typically used to set the size of function symbols.
.sleb128 expressionssleb128 stands for “signed little endian base 128.” This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format. See .uleb128.
.skip size , fillThis directive emits size bytes, each of value fill. Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as `.space'.
.space size , fillThis directive emits size bytes, each of value fill. Both size and fill are absolute expressions. If the comma and fill are omitted, fill is assumed to be zero. This is the same as `.skip'.
Warning:.spacehas a completely different meaning for HPPA targets; use.blockas a substitute. See HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001) for the meaning of the.spacedirective. See HPPA Assembler Directives, for a summary.
On the AMD 29K, this directive is ignored; it is accepted for compatibility with other AMD 29K assemblers.
Warning: In most versions of the gnu assembler, the directive.spacehas the effect of.blockSee Machine Dependencies.
.stabd, .stabn, .stabsThere are three directives that begin `.stab'. All emit symbols (see Symbols), for use by symbolic debuggers. The symbols are not entered in the as hash table: they cannot be referenced elsewhere in the source file. Up to five fields are required:
ld
and debuggers choke on silly bit patterns.
If a warning is detected while reading a .stabd, .stabn,
or .stabs statement, the symbol has probably already been created;
you get a half-formed symbol in your object file. This is
compatible with earlier assemblers!
.stabd type , other , descThe symbol's value is set to the location counter,
relocatably. When your program is linked, the value of this symbol
is the address of the location counter when the .stabd was
assembled.
.stabn type , other , desc , value"".
.stabs string , type , other , desc , value.string "str"Copy the characters in str to the object file. You may specify more than one string to copy, separated by commas. Unless otherwise specified for a particular machine, the assembler marks the end of each string with a 0 byte. You can use any of the escape sequences described in Strings.
.struct expressionSwitch to the absolute section, and set the section offset to expression, which must be an absolute expression. You might use this as follows:
.struct 0
field1:
.struct field1 + 4
field2:
.struct field2 + 4
field3:
This would define the symbol field1 to have the value 0, the symbol
field2 to have the value 4, and the symbol field3 to have the
value 8. Assembly would be left in the absolute section, and you would need to
use a .section directive of some sort to change to some other section
before further assembly.
.subsection nameThis is one of the ELF section stack manipulation directives. The others are
.section (see Section), .pushsection (see PushSection),
.popsection (see PopSection), and .previous
(see Previous).
This directive replaces the current subsection with name. The current
section is not changed. The replaced subsection is put onto the section stack
in place of the then current top of stack subsection.
.symverUse the .symver directive to bind symbols to specific version nodes
within a source file. This is only supported on ELF platforms, and is
typically used when assembling files to be linked into a shared library.
There are cases where it may make sense to use this in objects to be bound
into an application itself so as to override a versioned symbol from a
shared library.
For ELF targets, the .symver directive can be used like this:
.symver name, name2@nodename
If the symbol name is defined within the file
being assembled, the .symver directive effectively creates a symbol
alias with the name name2@nodename, and in fact the main reason that we
just don't try and create a regular alias is that the @ character isn't
permitted in symbol names. The name2 part of the name is the actual name
of the symbol by which it will be externally referenced. The name name
itself is merely a name of convenience that is used so that it is possible to
have definitions for multiple versions of a function within a single source
file, and so that the compiler can unambiguously know which version of a
function is being mentioned. The nodename portion of the alias should be
the name of a node specified in the version script supplied to the linker when
building a shared library. If you are attempting to override a versioned
symbol from a shared library, then nodename should correspond to the
nodename of the symbol you are trying to override.
If the symbol name is not defined within the file being assembled, all references to name will be changed to name2@nodename. If no reference to name is made, name2@nodename will be removed from the symbol table.
Another usage of the .symver directive is:
.symver name, name2@@nodename
In this case, the symbol name must exist and be defined within the file being assembled. It is similar to name2@nodename. The difference is name2@@nodename will also be used to resolve references to name2 by the linker.
The third usage of the .symver directive is:
.symver name, name2@@@nodename
When name is not defined within the file being assembled, it is treated as name2@nodename. When name is defined within the file being assembled, the symbol name, name, will be changed to name2@@nodename.
.tag structnameThis directive is generated by compilers to include auxiliary debugging
information in the symbol table. It is only permitted inside
.def/.endef pairs. Tags are used to link structure
definitions in the symbol table with instances of those structures.
`.tag' is only used when generating COFF format output; when
as is generating b.out, it accepts this directive but
ignores it.
.text subsectionTells as to assemble the following statements onto the end of the text subsection numbered subsection, which is an absolute expression. If subsection is omitted, subsection number zero is used.
.title "heading"Use heading as the title (second line, immediately after the source file name and pagenumber) when generating assembly listings.
This directive affects subsequent pages, as well as the current page if it appears within ten lines of the top of a page.
.typeThis directive is used to set the type of a symbol.
For COFF targets, this directive is permitted only within
.def/.endef pairs. It is used like this:
.type int
This records the integer int as the type attribute of a symbol table entry.
`.type' is associated only with COFF format output; when
as is configured for b.out output, it accepts this
directive but ignores it.
For ELF targets, the .type directive is used like this:
.type name , type description
This sets the type of symbol name to be either a function symbol or an object symbol. There are five different syntaxes supported for the type description field, in order to provide compatibility with various other assemblers. The syntaxes supported are:
.type <name>,#function
.type <name>,#object
.type <name>,@function
.type <name>,@object
.type <name>,%function
.type <name>,%object
.type <name>,"function"
.type <name>,"object"
.type <name> STT_FUNCTION
.type <name> STT_OBJECT
.uleb128 expressionsuleb128 stands for “unsigned little endian base 128.” This is a
compact, variable length representation of numbers used by the DWARF
symbolic debugging format. See .sleb128.
.val addrThis directive, permitted only within .def/.endef pairs,
records the address addr as the value attribute of a symbol table
entry.
`.val' is used only for COFF output; when as is
configured for b.out, it accepts this directive but ignores it.
.version "string"This directive creates a .note section and places into it an ELF
formatted note of type NT_VERSION. The note's name is set to string.
.vtable_entry table, offsetThis directive finds or creates a symbol table and creates a
VTABLE_ENTRY relocation for it with an addend of offset.
.vtable_inherit child, parentThis directive finds the symbol child and finds or creates the symbol
parent and then creates a VTABLE_INHERIT relocation for the
parent whose addend is the value of the child symbol. As a special case the
parent name of 0 is treated as refering the *ABS* section.
.warning "string"Similar to the directive .error
(see .error "string"), but just emits a warning.
.weak namesThis directive sets the weak attribute on the comma separated list of symbol
names. If the symbols do not already exist, they will be created.
On COFF targets other than PE, weak symbols are a GNU extension. This
directive sets the weak attribute on the comma separated list of symbol
names. If the symbols do not already exist, they will be created.
On the PE target, weak symbols are supported natively as weak aliases. When a weak symbol is created that is not an alias, GAS creates an alternate symbol to hold the default value.
.word expressionsThis directive expects zero or more expressions, of any section, separated by commas.
The size of the number emitted, and its byte order, depend on what target computer the assembly is for.
Warning: Special Treatment to support Compilers
Machines with a 32-bit address space, but that do less than 32-bit addressing, require the following special treatment. If the machine of interest to you does 32-bit addressing (or doesn't require it; see Machine Dependencies), you can ignore this issue.
In order to assemble compiler output into something that works,
as occasionally does strange things to `.word' directives.
Directives of the form `.word sym1-sym2' are often emitted by
compilers as part of jump tables. Therefore, when as assembles a
directive of the form `.word sym1-sym2', and the difference between
sym1 and sym2 does not fit in 16 bits, as
creates a secondary jump table, immediately before the next label.
This secondary jump table is preceded by a short-jump to the
first byte after the secondary table. This short-jump prevents the flow
of control from accidentally falling into the new table. Inside the
table is a long-jump to sym2. The original `.word'
contains sym1 minus the address of the long-jump to
sym2.
If there were several occurrences of `.word sym1-sym2' before the
secondary jump table, all of them are adjusted. If there was a
`.word sym3-sym4', that also did not fit in sixteen bits, a
long-jump to sym4 is included in the secondary jump table,
and the .word directives are adjusted to contain sym3
minus the address of the long-jump to sym4; and so on, for as many
entries in the original jump table as necessary.
One day these directives won't work. They are included for compatibility with older assemblers.
The machine instruction sets are (almost by definition) different on each machine where as runs. Floating point representations vary as well, and as often supports a few additional directives or command-line options for compatibility with other assemblers on a particular platform. Finally, some versions of as support special pseudo-instructions for branch optimization.
This chapter discusses most of these differences, though it does not include details on any machine's instruction set. For details on that subject, see the hardware manufacturer's manual.
as has no additional command-line options for the AMD
29K family.
The macro syntax used on the AMD 29K is like that described in the AMD
29K Family Macro Assembler Specification. Normal as
macros should still work.
`;' is the line comment character.
The character `?' is permitted in identifiers (but may not begin an identifier).
General-purpose registers are represented by predefined symbols of the
form `GRnnn' (for global registers) or `LRnnn'
(for local registers), where nnn represents a number between
0 and 127, written with no leading zeros. The leading
letters may be in either upper or lower case; for example, `gr13'
and `LR7' are both valid register names.
You may also refer to general-purpose registers by specifying the register number as the result of an expression (prefixed with `%%' to flag the expression as a register number):
%%expression
—where expression must be an absolute expression evaluating to a
number between 0 and 255. The range [0, 127] refers to
global registers, and the range [128, 255] to local registers.
In addition, as understands the following protected
special-purpose register names for the AMD 29K family:
vab chd pc0
ops chc pc1
cps rbp pc2
cfg tmc mmu
cha tmr lru
These unprotected special-purpose register names are also recognized:
ipc alu fpe
ipa bp inte
ipb fc fps
q cr exop
The AMD 29K family uses ieee floating-point numbers.
.block size , fillIn other versions of the gnu assembler, this directive is called `.space'.
.cputype.fileWarning: in other versions of the gnu assembler,.fileis used for the directive called.app-filein the AMD 29K support.
.line.sect.use section name.text, .data,
.data1, or .lit. With one of the first three section
name options, `.use' is equivalent to the machine directive
section name; the remaining case, `.use .lit', is the same as
`.data 200'.
as implements all the standard AMD 29K opcodes. No
additional pseudo-instructions are needed on this family.
For information on the 29K machine instruction set, see Am29000 User's Manual, Advanced Micro Devices, Inc.
The documentation here is primarily for the ELF object format.
as also supports the ECOFF and EVAX formats, but
features specific to these formats are not yet documented.
.arch directive.
The following processor names are recognized:
21064,
21064a,
21066,
21068,
21164,
21164a,
21164pc,
21264,
21264a,
21264b,
ev4,
ev5,
lca45,
ev5,
ev56,
pca56,
ev6,
ev67,
ev68.
The special name all may be used to allow the assembler to accept
instructions valid for any Alpha processor.
In order to support existing practice in OSF/1 with respect to .arch,
and existing practice within MILO (the Linux ARC bootloader), the
numbered processor names (e.g. 21064) enable the processor-specific PALcode
instructions, while the “electro-vlasic” names (e.g. ev4) do not.
.mdebug encapsulation for
stabs directives and procedure descriptors. The default is to automatically
enable .mdebug when the first stabs directive is seen.
.bss,
while smaller symbols are placed in .sbss.
The assembler syntax closely follow the Alpha Reference Manual; assembler directives and general syntax closely follow the OSF/1 and OpenVMS syntax, with a few differences for ELF.
`#' is the line comment character.
`;' can be used instead of a newline to separate statements.
The 32 integer registers are referred to as `$n' or `$rn'. In addition, registers 15, 28, 29, and 30 may be referred to by the symbols `$fp', `$at', `$gp', and `$sp' respectively.
The 32 floating-point registers are referred to as `$fn'.
Some of these relocations are available for ECOFF, but mostly only for ELF. They are modeled after the relocation format introduced in Digital Unix 4.0, but there are additions.
The format is `!tag' or `!tag!number' where tag is the name of the relocation. In some cases number is used to relate specific instructions.
The relocation is placed at the end of the instruction like so:
ldah $0,a($29) !gprelhigh
lda $0,a($0) !gprellow
ldq $1,b($29) !literal!100
ldl $2,0($1) !lituse_base!100
!literal!literal!Nldq instruction to load the address of a symbol
from the GOT.
A sequence number N is optional, and if present is used to pair
lituse relocations with this literal relocation. The
lituse relocations are used by the linker to optimize the code
based on the final location of the symbol.
Note that these optimizations are dependent on the data flow of the
program. Therefore, if any lituse is paired with a
literal relocation, then all uses of the register set by
the literal instruction must also be marked with lituse
relocations. This is because the original literal instruction
may be deleted or transformed into another instruction.
Also note that there may be a one-to-many relationship between
literal and lituse, but not a many-to-one. That is, if
there are two code paths that load up the same address and feed the
value to a single use, then the use may not use a lituse
relocation.
!lituse_base!Nldl) to indicate
that the literal is used for an address load. The offset field of the
instruction must be zero. During relaxation, the code may be altered
to use a gp-relative load.
!lituse_jsr!Njsr) to
indicate that the literal is used for a call. During relaxation, the
code may be altered to use a direct branch (e.g. bsr).
!lituse_jsrdirect!Nlituse_jsr, but also that this call cannot be vectored
through a PLT entry. This is useful for functions with special calling
conventions which do not allow the normal call-clobbered registers to be
clobbered.
!lituse_bytoff!Nextbl) to indicate
that only the low 3 bits of the address are relevant. During relaxation,
the code may be altered to use an immediate instead of a register shift.
!lituse_addr!Nldq instruction may not be
altered or deleted. This is useful in conjunction with lituse_jsr
to test whether a weak symbol is defined.
ldq $27,foo($29) !literal!1
beq $27,is_undef !lituse_addr!1
jsr $26,($27),foo !lituse_jsr!1
!lituse_tlsgd!N__tls_get_addr used to compute the
address of the thread-local storage variable whose descriptor was
loaded with !tlsgd!N.
!lituse_tlsldm!N__tls_get_addr used to compute the
address of the base of the thread-local storage block for the current
module. The descriptor for the module must have been loaded with
!tlsldm!N.
!gpdisp!Nldah and lda to load the GP from the current
address, a-la the ldgp macro. The source register for the
ldah instruction must contain the address of the ldah
instruction. There must be exactly one lda instruction paired
with the ldah instruction, though it may appear anywhere in
the instruction stream. The immediate operands must be zero.
bsr $26,foo
ldah $29,0($26) !gpdisp!1
lda $29,0($29) !gpdisp!1
!gprelhighldah instruction to add the high 16 bits of a
32-bit displacement from the GP.
!gprellow!gprel!samegp$27
or perform a standard GP load in the first two instructions via the
.prologue directive.
!tlsgd!tlsgd!Nlda instruction to load the address of a TLS
descriptor for a symbol in the GOT.
The sequence number N is optional, and if present it used to
pair the descriptor load with both the literal loading the
address of the __tls_get_addr function and the lituse_tlsgd
marking the call to that function.
For proper relaxation, both the tlsgd, literal and
lituse relocations must be in the same extended basic block.
That is, the relocation with the lowest address must be executed
first at runtime.
!tlsldm!tlsldm!Nlda instruction to load the address of a TLS
descriptor for the current module in the GOT.
Similar in other respects to tlsgd.
!gotdtprelldq instruction to load the offset of the TLS
symbol within its module's thread-local storage block. Also known
as the dynamic thread pointer offset or dtp-relative offset.
!dtprelhi!dtprello!dtprelgprel relocations except they compute dtp-relative offsets.
!gottprelldq instruction to load the offset of the TLS
symbol from the thread pointer. Also known as the tp-relative offset.
!tprelhi!tprello!tprelgprel relocations except they compute tp-relative offsets.
The Alpha family uses both ieee and VAX floating-point numbers.
as for the Alpha supports many additional directives for compatibility with the native assembler. This section describes them only briefly.
These are the additional directives in as for the Alpha:
.arch cpu.ent function[, n].mdebug information, this will create a procedure descriptor for
the function. In ELF, it will mark the symbol as a function a-la the
generic .type directive.
.end function.size directive.
.mask mask, offset$26) is saved first.
This and the other directives that describe the stack frame are
currently only used when generating .mdebug information. They
may in the future be used to generate DWARF2 .debug_frame unwind
information for hand written assembly.
.fmask mask, offset.mask.
.frame framereg, frameoffset, retreg[, argoffset]$fp or $sp. The
frame pointer is frameoffset bytes below the CFA. The return
address is initially located in retreg until it is saved as
indicated in .mask. For compatibility with OSF/1 an optional
argoffset parameter is accepted and ignored. It is believed to
indicate the offset from the CFA to the saved argument registers.
.prologue n$27. 0 indicates that $27 is not used; 1
indicates that the first two instructions of the function use $27
to perform a load of the GP register; 2 indicates that $27 is
used in some non-standard way and so the linker cannot elide the load of
the procedure vector during relaxation.
.usepv function, which$27 register, similar to
.prologue, but without the other semantics of needing to
be inside an open .ent/.end block.
The which argument should be either no, indicating that
$27 is not used, or std, indicating that the first two
instructions of the function perform a GP load.
One might use this directive instead of .prologue if you are
also using dwarf2 CFI directives.
.gprel32 expression.t_floating expression.s_floating expression.f_floating expression.g_floating expression.d_floating expression.set featureat$at or $28) register. Some macros may not be
expanded without this and will generate an error message if noat
is in effect. When at is in effect, a warning will be generated
if $at is used by the programmer.
macrobr label vs br $31,label are
considered alternate forms and not macros.
movereordervolatileThe following directives are recognized for compatibility with the OSF/1 assembler but are ignored.
.proc .aproc
.reguse .livereg
.option .aent
.ugen .eflag
.alias .noalias
For detailed information on the Alpha machine instruction set, see the Alpha Architecture Handbook.
-marc[5|6|7|8]-marc is the same as -marc6, which
is also the default.
arc5arc6 mov.f r0,r1
beq foo
arc7arc8Note: the .option directive can to be used to select a core
variant from within assembly code.
-EB-ELThe ARC core does not currently have hardware floating point
support. Software floating point support is provided by GCC
and uses ieee floating-point numbers.
The ARC version of as supports the following additional
machine directives:
.2byte expressions.3byte expressions.4byte expressions.extAuxRegister name,address,moder (readonly)w (write only)r|w (read or write)For example:
.extAuxRegister mulhi,0x12,w
This specifies an extension auxiliary register called mulhi which is at address 0x12 in the memory space and which is only writable.
.extCondCode suffix,value .extCondCode is_busy,0x14
add.is_busy r1,r2,r3
bis_busy _main
.extCoreRegister name,regnum,mode,shortcutThe other parameter gives a description of the register having a shortcut in the pipeline. The valid values are:
can_shortcutcannot_shortcutFor example:
.extCoreRegister mlo,57,r,can_shortcut
This defines an extension core register mlo with the value 57 which can shortcut the pipeline.
.extInstruction name,opcode,subopcode,suffixclass,syntaxclassSUFFIX_NONE, SUFFIX_COND,
SUFFIX_FLAG which indicates the absence or presence of
conditional suffixes and flag setting by the extension instruction.
It is also possible to specify that an instruction sets the flags and
is conditional by using SUFFIX_CODE | SUFFIX_FLAG.
SYNTAX_2OP:SYNTAX_3OP:In addition there could be modifiers for the syntax class as described below:
OP1_MUST_BE_IMM:
Modifies syntax class SYNTAX_3OP, specifying that the first operand
of a three-operand instruction must be an immediate (i.e. the result
is discarded). OP1_MUST_BE_IMM is used by bitwise ORing it with
SYNTAX_3OP as given in the example below. This could usually be used
to set the flags using specific instructions and not retain results.
OP1_IMM_IMPLIED:
Modifies syntax class SYNTAX_20P, it specifies that there is an
implied immediate destination operand which does not appear in the
syntax. For example, if the source code contains an instruction like:
inst r1,r2
it really means that the first argument is an implied immediate (that is, the result is discarded). This is the same as though the source code were: inst 0,r1,r2. You use OP1_IMM_IMPLIED by bitwise ORing it with SYNTAX_20P.
For example, defining 64-bit multiplier with immediate operands:
.extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
SYNTAX_3OP|OP1_MUST_BE_IMM
The above specifies an extension instruction called mp64 which has 3 operands, sets the flags, can be used with a condition code, for which the first operand is an immediate. (Equivalent to discarding the result of the operation).
.extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
This describes a 2 operand instruction with an implicit first immediate operand. The result of this operation would be discarded.
.half expressions.long expressions.option arc|arc5|arc6|arc7|arc8.option directive must be followed by the desired core
version. Again arc is an alias for
arc6.
Note: the .option directive overrides the command line option
-marc; a warning is emitted when the version is not consistent
between the two - even for the implicit default core version
(arc6).
.short expressions.word expressionsFor information on the ARC instruction set, see ARC Programmers Reference Manual, ARC International (www.arc.com)
-mcpu=processor[+extension...]arm1,
arm2,
arm250,
arm3,
arm6,
arm60,
arm600,
arm610,
arm620,
arm7,
arm7m,
arm7d,
arm7dm,
arm7di,
arm7dmi,
arm70,
arm700,
arm700i,
arm710,
arm710t,
arm720,
arm720t,
arm740t,
arm710c,
arm7100,
arm7500,
arm7500fe,
arm7t,
arm7tdmi,
arm7tdmi-s,
arm8,
arm810,
strongarm,
strongarm1,
strongarm110,
strongarm1100,
strongarm1110,
arm9,
arm920,
arm920t,
arm922t,
arm940t,
arm9tdmi,
arm9e,
arm926e,
arm926ej-s,
arm946e-r0,
arm946e,
arm966e-r0,
arm966e,
arm10t,
arm10e,
arm1020,
arm1020t,
arm1020e,
arm1026ej-s,
arm1136j-s,
arm1136jf-s,
arm1176jz-s,
arm1176jzf-s,
mpcore,
mpcorenovfp,
ep9312 (ARM920 with Cirrus Maverick coprocessor),
i80200 (Intel XScale processor)
iwmmxt (Intel(r) XScale processor with Wireless MMX(tm) technology coprocessor)
and
xscale.
The special name all may be used to allow the
assembler to accept instructions valid for any ARM processor.
In addition to the basic instruction set, the assembler can be told to
accept various extension mnemonics that extend the processor using the
co-processor instruction space. For example, -mcpu=arm920+maverick
is equivalent to specifying -mcpu=ep9312. The following extensions
are currently supported:
+maverick
+iwmmxt
and
+xscale.
-march=architecture[+extension...]armv1,
armv2,
armv2a,
armv2s,
armv3,
armv3m,
armv4,
armv4xm,
armv4t,
armv4txm,
armv5,
armv5t,
armv5txm,
armv5te,
armv5texp,
armv6,
armv6j,
armv6k,
armv6z,
armv6zk,
iwmmxt
and
xscale.
If both -mcpu and
-march are specified, the assembler will use
the setting for -mcpu.
The architecture option can be extended with the same instruction set
extension options as the -mcpu option.
-mfpu=floating-point-formatsoftfpa,
fpe,
fpe2,
fpe3,
fpa,
fpa10,
fpa11,
arm7500fe,
softvfp,
softvfp+vfp,
vfp,
vfp10,
vfp10-r0,
vfp9,
vfpxd,
arm1020t,
arm1020e,
arm1136jf-s
and
maverick.
In addition to determining which instructions are assembled, this option
also affects the way in which the .double assembler directive behaves
when assembling little-endian code.
The default is dependent on the processor selected. For Architecture 5 or later, the default is to assembler for VFP instructions; for earlier architectures the default is to assemble for FPA instructions.
-mthumb.code 16 directive.
-mthumb-interwork-mapcs [26|32]-matpcs-mapcs-float-mapcs-reentrant-mfloat-abi=abisoft,
softfp
and
hard.
-meabi=vergnu
and
4.
-EB-EL-kThe presence of a `@' on a line indicates the start of a comment that extends to the end of the current line. If a `#' appears as the first character of a line, the whole line is treated as a comment.
The `;' character can be used instead of a newline to separate statements.
Either `#' or `$' can be used to indicate immediate operands.
*TODO* Explain about /data modifier on symbols.
*TODO* Explain about ARM register naming, and the predefined names.
The ARM family uses ieee floating-point numbers.
.align expression [, expression] .req register name foo .req r0
.unreq alias-namereq directive. For example:
foo .req r0
.unreq foo
An error occurs if the name is undefined. Note - this pseudo op can be used to delete builtin in register name aliases (eg 'r0'). This should only be done if it is really necessary.
.code [16|32].thumb.arm.force_thumb.thumb_func.thumb
.thumb_set.set directive in that it
creates a symbol which is an alias for another symbol (possibly not yet
defined). This directive also has the added property in that it marks
the aliased symbol as being a thumb function entry point, in the same
way that the .thumb_func directive does.
.ltorgGAS maintains a separate literal pool for each section and each
sub-section. The .ltorg directive will only affect the literal
pool of the current section and sub-section. At the end of assembly
all remaining, un-empty literal pools will automatically be dumped.
Note - older versions of GAS would dump the current literal
pool any time a section change occurred. This is no longer done, since
it prevents accurate control of the placement of literal pools.
.pool.unwind_fnstart.unwind_fnendIf no personality routine has been specified then standard personality routine 0 or 1 will be used, depending on the number of unwind opcodes required.
.cantunwind.personality name.personalityindex index.handlerdata.fnend directive will be added to the exception table entry.
Must be preceded by a .personality or .personalityindex
directive.
.save reglist
core registers
.save {r4, r5, r6, lr} stmfd sp!, {r4, r5, r6, lr}
FPA registers
.save f4, 2 sfmfd f4, 2, [sp]!
VFP registers
.save {d8, d9, d10} fstmdf sp!, {d8, d9, d10}
iWMMXt registers
.save {wr10, wr11} wstrd wr11, [sp, #-8]! wstrd wr10, [sp, #-8]! or .save wr11 wstrd wr11, [sp, #-8]! .save wr10 wstrd wr10, [sp, #-8]!
.pad #count.movsp reg.setfp fpreg, spreg [, #offset]The syntax of this directive is the same as the sub or mov
instruction used to set the frame pointer. spreg must be either
sp or mentioned in a previous .movsp directive.
.movsp ip
mov ip, sp
...
.setfp fp, ip, #4
sub fp, ip, #4
.raw offset, byte1, ...For example .unwind_raw 4, 0xb1, 0x01 is equivalent to
.save {r0}
as implements all the standard ARM opcodes. It also
implements several pseudo opcodes, including several synthetic load
instructions.
NOP nop
This pseudo op will always evaluate to a legal ARM instruction that does nothing. Currently it will evaluate to MOV r0, r0.
LDR ldr <register> , = <expression>
If expression evaluates to a numeric constant then a MOV or MVN instruction will be used in place of the LDR instruction, if the constant can be generated by either of these instructions. Otherwise the constant will be placed into the nearest literal pool (if it not already there) and a PC relative LDR instruction will be generated.
ADR adr <register> <label>
This instruction will load the address of label into the indicated register. The instruction will evaluate to a PC relative ADD or SUB instruction depending upon where the label is located. If the label is out of range, or if it is not defined in the same file (and section) as the ADR instruction, then an error will be generated. This instruction will not make use of the literal pool.
ADRL adrl <register> <label>
This instruction will load the address of label into the indicated register. The instruction will evaluate to one or two PC relative ADD or SUB instructions depending upon where the label is located. If a second instruction is not needed a NOP instruction will be generated in its place, so that this instruction is always 8 bytes long.
If the label is out of range, or if it is not defined in the same file (and section) as the ADRL instruction, then an error will be generated. This instruction will not make use of the literal pool.
For information on the ARM or Thumb instruction sets, see ARM Software Development Toolkit Reference Manual, Advanced RISC Machines Ltd.
The ARM ELF specification requires that special symbols be inserted into object files to mark certain features:
$a$t$dThe assembler will automatically insert these symbols for you - there is no need to code them yourself. Support for tagging symbols ($b, $f, $p and $m) which is also mentioned in the current ARM ELF specification is not implemented. This is because they have been dropped from the new EABI and so tools cannot rely upon their presence.
The CRIS version of as has these
machine-dependent command-line options.
The format of the generated object files can be either ELF or
a.out, specified by the command-line options
--emulation=crisaout and --emulation=criself.
The default is ELF (criself), unless as has been
configured specifically for a.out by using the configuration
name cris-axis-aout.
There are two different link-incompatible ELF object file variants for CRIS, for use in environments where symbols are expected to be prefixed by a leading `_' character and for environments without such a symbol prefix. The variant used for GNU/Linux port has no symbol prefix. Which variant to produce is specified by either of the options --underscore and --no-underscore. The default is --underscore. Since symbols in CRIS a.out objects are expected to have a `_' prefix, specifying --no-underscore when generating a.out objects is an error. Besides the object format difference, the effect of this option is to parse register names differently (see crisnous). The --no-underscore option makes a `$' register prefix mandatory.
The option --pic must be passed to as in
order to recognize the symbol syntax used for ELF (SVR4 PIC)
position-independent-code (see crispic). This will also
affect expansion of instructions. The expansion with
--pic will use PC-relative rather than (slightly
faster) absolute addresses in those expansions.
The option --march=architecture specifies the recognized instruction set and recognized register names. It also controls the architecture type of the object file. Valid values for architecture are:
v0_v10v10v32common_v10_v32When -N is specified, as will emit a
warning when a 16-bit branch instruction is expanded into a
32-bit multiple-instruction construct (see CRIS-Expand).
Some versions of the CRIS v10, for example in the Etrax 100 LX,
contain a bug that causes destabilizing memory accesses when a
multiply instruction is executed with certain values in the
first operand just before a cache-miss. When the
--mul-bug-abort command line option is active (the
default value), as will refuse to assemble a file
containing a multiply instruction at a dangerous offset, one
that could be the last on a cache-line, or is in a section with
insufficient alignment. This placement checking does not catch
any case where the multiply instruction is dangerously placed
because it is located in a delay-slot. The
--mul-bug-abort command line option turns off the
checking.
as will silently choose an instruction that fits
the operand size for `[register+constant]' operands. For
example, the offset 127 in move.d [r3+127],r4 fits
in an instruction using a signed-byte offset. Similarly,
move.d [r2+32767],r1 will generate an instruction using a
16-bit offset. For symbolic expressions and constants that do
not fit in 16 bits including the sign bit, a 32-bit offset is
generated.
For branches, as will expand from a 16-bit branch
instruction into a sequence of instructions that can reach a
full 32-bit address. Since this does not correspond to a single
instruction, such expansions can optionally be warned about.
See CRIS-Opts.
If the operand is found to fit the range, a lapc mnemonic
will translate to a lapcq instruction. Use lapc.d
to force the 32-bit lapc instruction.
Similarly, the addo mnemonic will translate to the
shortest fitting instruction of addoq, addo.w and
addo.d, when used with a operand that is a constant known
at assembly time.
Some symbols are defined by the assembler. They're intended to be used in conditional assembly, for example:
.if ..asm.arch.cris.v32
code for CRIS v32
.elseif ..asm.arch.cris.common_v10_v32
code common to CRIS v32 and CRIS v10
.elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
code for v10
.else
.error "Code needs to be added here."
.endif
These symbols are defined in the assembler, reflecting command-line options, either when specified or the default. They are always defined, to 0 or 1.
..asm.arch.cris.any_v0_v10..asm.arch.cris.common_v10_v32..asm.arch.cris.v10..asm.arch.cris.v32Speaking of symbols, when a symbol is used in code, it can have a suffix modifying its value for use in position-independent code. See CRIS-Pic.
There are different aspects of the CRIS assembly syntax.
The character `#' is a line comment character. It starts a comment if and only if it is placed at the beginning of a line.
A `;' character starts a comment anywhere on the line, causing all characters up to the end of the line to be ignored.
A `@' character is handled as a line separator equivalent to a logical new-line character (except in a comment), so separate instructions can be specified on a single line.
When generating position-independent code (SVR4
PIC) for use in cris-axis-linux-gnu or crisv32-axis-linux-gnu
shared libraries, symbol
suffixes are used to specify what kind of run-time symbol lookup
will be used, expressed in the object as different
relocation types. Usually, all absolute symbol values
must be located in a table, the global offset table,
leaving the code position-independent; independent of values of
global symbols and independent of the address of the code. The
suffix modifies the value of the symbol, into for example an
index into the global offset table where the real symbol value
is entered, or a PC-relative value, or a value relative to the
start of the global offset table. All symbol suffixes start
with the character `:' (omitted in the list below). Every
symbol use in code or a read-only section must therefore have a
PIC suffix to enable a useful shared library to be created.
Usually, these constructs must not be used with an additive
constant offset as is usually allowed, i.e. no 4 as in
symbol + 4 is allowed. This restriction is checked at
link-time, not at assembly-time.
GOTmove.d
[$r0+extsym:GOT],$r9
GOT16move.d
[$r0+asymbol:GOT16],$r10
PLTadd.d fnname:PLT,$pc
PLTGmove.d
fnname:PLTG,$r3
GOTPLTjsr
[$r0+fnname:GOTPLT]
GOTPLT16jsr
[$r0+fnname:GOTPLT16]
GOTOFFmove.d [$r0+localsym:GOTOFF],r3
A `$' character may always prefix a general or special
register name in an instruction operand but is mandatory when
the option --no-underscore is specified or when the
.syntax register_prefix directive is in effect
(see crisnous). Register names are case-insensitive.
There are a few CRIS-specific pseudo-directives in addition to the generic ones. See Pseudo Ops. Constants emitted by pseudo-directives are in little-endian order for CRIS. There is no support for floating-point-specific directives for CRIS.
.dword EXPRESSIONS.dword directive is a synonym for .int,
expecting zero or more EXPRESSIONS, separated by commas. For
each expression, a 32-bit little-endian constant is emitted.
.syntax ARGUMENT.syntax directive takes as ARGUMENT one of the
following case-sensitive choices.
no_register_prefix.syntax no_register_prefix directive
makes a `$' character prefix on all registers optional. It
overrides a previous setting, including the corresponding effect
of the option --no-underscore. If this directive is
used when ordinary symbols do not have a `_' character
prefix, care must be taken to avoid ambiguities whether an
operand is a register or a symbol; using symbols with names the
same as general or special registers then invoke undefined
behavior.
register_prefixleading_underscoreno_leading_underscore.syntax leading_underscore
directive and emits an error if the option --underscore
is in effect.
.arch ARGUMENTThe Mitsubishi D10V version of as has a few machine
dependent options.
as will attempt to optimize its output by detecting when
instructions can be executed in parallel.
as will sometimes swap the
order of instructions. Normally this generates a warning. When this option
is used, no warning will be generated when instructions are swapped.
as packs adjacent short instructions into a single packed
instruction. `--no-gstabs-packing' turns instruction packing off if
`--gstabs' is specified as well; `--gstabs-packing' (the
default) turns instruction packing on even when `--gstabs' is
specified.
The D10V syntax is based on the syntax in Mitsubishi's D10V architecture manual. The differences are detailed below.
The D10V version of as uses the instruction names in the D10V
Architecture Manual. However, the names in the manual are sometimes ambiguous.
There are instruction names that can assemble to a short or long form opcode.
How does the assembler pick the correct form? as will always pick the
smallest form if it can. When dealing with a symbol that is not defined yet when a
line is being assembled, it will always use the long form. If you need to force the
assembler to use either the short or long form of the instruction, you can append
either `.s' (short) or `.l' (long) to it. For example, if you are writing
an assembly program and you want to do a branch to a symbol that is defined later
in your program, you can write `bra.s foo'.
Objdump and GDB will always append `.s' or `.l' to instructions which
have both short and long forms.
The D10V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.
If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.
`;' and `#' are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially. To specify the executing order, use the following symbols:
abs a1 -> abs r0abs r0 <- abs a1ld2w r2,@r8+ || mac a0,r0,r7ld2w r2,@r8+ ||mac a0,r0,r7ld2w r2,@r8+mac a0,r0,r7ld2w r2,@r8+ ->mac a0,r0,r7You can use the predefined symbols `r0' through `r15' to refer to the D10V registers. You can also use `sp' as an alias for `r15'. The accumulators are `a0' and `a1'. There are special register-pair names that may optionally be used in opcodes that require even-numbered registers. Register names are not case sensitive.
Register Pairs
r0-r1r2-r3r4-r5r6-r7r8-r9r10-r11r12-r13r14-r15The D10V also has predefined symbols for these control registers and status bits:
pswbpswpcbpcrpt_crpt_srpt_emod_smod_eibaf0f1cas understands the following addressing modes for the D10V.
Rn in the following refers to any of the numbered
registers, but not the control registers.
Rn@Rn@Rn+@Rn-@-SP@(disp, Rn)#immAny symbol followed by @word will be replaced by the symbol's value
shifted right by 2. This is used in situations such as loading a register
with the address of a function (or any other code fragment). For example, if
you want to load a register with the location of the function main then
jump to that function, you could do it as follows:
ldi r2, main@word
jmp r2
The D10V has no hardware floating point, but the .float and .double
directives generates ieee floating-point numbers for compatibility
with other development tools.
For detailed information on the D10V machine instruction set, see
D10V Architecture: A VLIW Microprocessor for Multimedia Applications
(Mitsubishi Electric Corp.).
as implements all the standard D10V opcodes. The only changes are those
described in the section on size modifiers
The Mitsubishi D30V version of as has a few machine
dependent options.
as will attempt to optimize its output by detecting when
instructions can be executed in parallel.
as will issue a warning every
time it adds a nop instruction.
as will issue a warning if it
needs to insert a nop after a 32-bit multiply before a load or 16-bit
multiply instruction.
The D30V syntax is based on the syntax in Mitsubishi's D30V architecture manual. The differences are detailed below.
The D30V version of as uses the instruction names in the D30V
Architecture Manual. However, the names in the manual are sometimes ambiguous.
There are instruction names that can assemble to a short or long form opcode.
How does the assembler pick the correct form? as will always pick the
smallest form if it can. When dealing with a symbol that is not defined yet when a
line is being assembled, it will always use the long form. If you need to force the
assembler to use either the short or long form of the instruction, you can append
either `.s' (short) or `.l' (long) to it. For example, if you are writing
an assembly program and you want to do a branch to a symbol that is defined later
in your program, you can write `bra.s foo'.
Objdump and GDB will always append `.s' or `.l' to instructions which
have both short and long forms.
The D30V assembler takes as input a series of instructions, either one-per-line, or in the special two-per-line format described in the next section. Some of these instructions will be short-form or sub-instructions. These sub-instructions can be packed into a single instruction. The assembler will do this automatically. It will also detect when it should not pack instructions. For example, when a label is defined, the next instruction will never be packaged with the previous one. Whenever a branch and link instruction is called, it will not be packaged with the next instruction so the return address will be valid. Nops are automatically inserted when necessary.
If you do not want the assembler automatically making these decisions, you can control the packaging and execution type (parallel or sequential) with the special execution symbols described in the next section.
`;' and `#' are the line comment characters. Sub-instructions may be executed in order, in reverse-order, or in parallel. Instructions listed in the standard one-per-line format will be executed sequentially unless you use the `-O' option.
To specify the executing order, use the following symbols:
The D30V syntax allows either one instruction per line, one instruction per line with the execution symbol, or two instructions per line. For example
abs r2,r3 -> abs r4,r5abs r2,r3 <- abs r4,r5abs r2,r3 || abs r4,r5ldw r2,@(r3,r4) ||mulx r6,r8,r9mulx a0,r8,r9stw r2,@(r3,r4)stw r2,@(r3,r4) ->mulx a0,r8,r9stw r2,@(r3,r4) <-mulx a0,r8,r9Since `$' has no special meaning, you may use it in symbol names.
as supports the full range of guarded execution
directives for each instruction. Just append the directive after the
instruction proper. The directives are:
You can use the predefined symbols `r0' through `r63' to refer to the D30V registers. You can also use `sp' as an alias for `r63' and `link' as an alias for `r62'. The accumulators are `a0' and `a1'.
The D30V also has predefined symbols for these control registers and status bits:
pswbpswpcbpcrpt_crpt_srpt_emod_smod_eibaf0f1f2f3f4f5f6f7svvacbas understands the following addressing modes for the D30V.
Rn in the following refers to any of the numbered
registers, but not the control registers.
Rn@Rn@Rn+@Rn-@-SP@(disp, Rn)#immThe D30V has no hardware floating point, but the .float and .double
directives generates ieee floating-point numbers for compatibility
with other development tools.
For detailed information on the D30V machine instruction set, see
D30V Architecture: A VLIW Microprocessor for Multimedia Applications
(Mitsubishi Electric Corp.).
as implements all the standard D30V opcodes. The only changes are those
described in the section on size modifiers
as has no additional command-line options for the
Renesas (formerly Hitachi) H8/300 family.
`;' is the line comment character.
`$' can be used instead of a newline to separate statements. Therefore you may not use `$' in symbol names on the H8/300.
You can use predefined symbols of the form `rnh' and `rnl' to refer to the H8/300 registers as sixteen 8-bit general-purpose registers. n is a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid register names.
You can also use the eight predefined symbols `rn' to refer to the H8/300 registers as 16-bit registers (you must use this form for addressing).
On the H8/300H, you can also use the eight predefined symbols `ern' (`er0' ... `er7') to refer to the 32-bit general purpose registers.
The two control registers are called pc (program counter; a
16-bit register, except on the H8/300H where it is 24 bits) and
ccr (condition code register; an 8-bit register). r7 is
used as the stack pointer, and can also be called sp.
as understands the following addressing modes for the H8/300:
rn@rn@(d, rn)@(d:16, rn)@(d:24, rn)@rn+@-rn@aa@aa:8@aa:16@aa:24aa. (The address size `:24' only makes
sense on the H8/300H.)
#xx#xx:8#xx:16#xx:32as neither
requires this nor uses it—the data size required is taken from
context.
@@aa@@aa:8as neither requires this nor uses it.
The H8/300 family has no hardware floating point, but the .float
directive generates ieee floating-point numbers for compatibility
with other development tools.
as has the following machine-dependent directives for
the H8/300:
.h8300h.int emit 32-bit numbers rather than the usual (16-bit)
for the H8/300 family.
.h8300s.int emit 32-bit numbers rather than the usual (16-bit)
for the H8/300 family.
.h8300hn.int emit 32-bit numbers rather than
the usual (16-bit) for the H8/300 family.
.h8300sn.int emit 32-bit numbers rather than
the usual (16-bit) for the H8/300 family.
On the H8/300 family (including the H8/300H) `.word' directives generate 16-bit numbers.
For detailed information on the H8/300 machine instruction set, see H8/300 Series Programming Manual. For information specific to the H8/300H, see H8/300H Series Programming Manual (Renesas).
as implements all the standard H8/300 opcodes. No additional
pseudo-instructions are needed on this family.
Four H8/300 instructions (add, cmp, mov,
sub) are defined with variants using the suffixes `.b',
`.w', and `.l' to specify the size of a memory operand.
as supports these suffixes, but does not require them;
since one of the operands is always a register, as can
deduce the correct size.
For example, since r0 refers to a 16-bit register,
mov r0,@foo
is equivalent to
mov.w r0,@foo
If you use the size suffixes, as issues a warning when
the suffix and the register size do not match.
as has no additional command-line options for the
Renesas (formerly Hitachi) H8/500 family.
`!' is the line comment character.
`;' can be used instead of a newline to separate statements.
Since `$' has no special meaning, you may use it in symbol names.
You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', `r6', and `r7' to refer to the H8/500 registers.
The H8/500 also has these control registers:
cpdpbptpepsrccrAll registers are 16 bits long. To represent 32 bit numbers, use two
adjacent registers; for distant memory addresses, use one of the segment
pointers (cp for the program counter; dp for
r0–r3; ep for r4 and r5; and
tp for r6 and r7.
as understands the following addressing modes for the H8/500:
Rn@Rn@(d:8, Rn)@(d:16, Rn)@-Rn@Rn+@aa:8@aa:16#xx:8#xx:16The H8/500 family has no hardware floating point, but the .float
directive generates ieee floating-point numbers for compatibility
with other development tools.
as has no machine-dependent directives for the H8/500.
However, on this platform the `.int' and `.word' directives
generate 16-bit numbers.
For detailed information on the H8/500 machine instruction set, see H8/500 Series Programming Manual (Renesas M21T001).
as implements all the standard H8/500 opcodes. No additional
pseudo-instructions are needed on this family.
As a back end for gnu cc as has been throughly tested and should
work extremely well. We have tested it only minimally on hand written assembly
code and no one has tested it much on the assembly output from the HP
compilers.
The format of the debugging sections has changed since the original
as port (version 1.3X) was released; therefore,
you must rebuild all HPPA objects and libraries with the new
assembler so that you can debug the final executable.
The HPPA as port generates a small subset of the relocations
available in the SOM and ELF object file formats. Additional relocation
support will be added as it becomes necessary.
as has no machine-dependent command-line options for the HPPA.
The assembler syntax closely follows the HPPA instruction set reference manual; assembler directives and general syntax closely follow the HPPA assembly language reference manual, with a few noteworthy differences.
First, a colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.
Some obscure expression parsing problems may affect hand written code which
uses the spop instructions, or code which makes significant
use of the ! line separator.
as is much less forgiving about missing arguments and other
similar oversights than the HP assembler. as notifies you
of missing arguments as syntax errors; this is regarded as a feature, not a
bug.
Finally, as allows you to use an external symbol without
explicitly importing the symbol. Warning: in the future this will be
an error for HPPA targets.
Special characters for HPPA targets include:
`;' is the line comment character.
`!' can be used instead of a newline to separate statements.
Since `$' has no special meaning, you may use it in symbol names.
The HPPA family uses ieee floating-point numbers.
as for the HPPA supports many additional directives for
compatibility with the native assembler. This section describes them only
briefly. For detailed information on HPPA-specific assembler directives, see
HP9000 Series 800 Assembly Language Reference Manual (HP 92432-90001).
as does not support the following assembler directives
described in the HP manual:
.endm .liston
.enter .locct
.leave .macro
.listoff
Beyond those implemented for compatibility, as supports one
additional assembler directive for the HPPA: .param. It conveys
register argument locations for static functions. Its syntax closely follows
the .export directive.
These are the additional directives in as for the HPPA:
.block n.blockz n.call.callinfo [ param=value, ... ] [ flag, ... ]param may be any of `frame' (frame size), `entry_gr' (end of general register range), `entry_fr' (end of float register range), `entry_sr' (end of space register range).
The values for flag are `calls' or `caller' (proc has
subroutines), `no_calls' (proc does not call subroutines), `save_rp'
(preserve return pointer), `save_sp' (proc preserves stack pointer),
`no_unwind' (do not unwind this proc), `hpux_int' (proc is interrupt
routine).
.code.copyright "string".copyright "string".enter.entry.exit.export name [ ,typ ] [ ,param=r ]param, if present, provides either relocation information for the
procedure arguments and result, or a privilege level. param may be
`argwn' (where n ranges from 0 to 3, and
indicates one of four one-word arguments); `rtnval' (the procedure's
result); or `priv_lev' (privilege level). For arguments or the result,
r specifies how to relocate, and must be one of `no' (not
relocatable), `gr' (argument is in general register), `fr' (in
floating point register), or `fu' (upper half of float register).
For `priv_lev', r is an integer.
.half nas directive .short.
.import name [ ,typ ].export; make a procedure available to call. The arguments
use the same conventions as the first two arguments for .export.
.label name.leave.origin lcas
portable directive .org.
.param name [ ,typ ] [ ,param=r ].export, but used for static procedures.
.proc.procend .reg expr.equ; define label with the absolute expression
expr as its value.
.space secname [ ,params ]If specified, the list params declares attributes of the section,
identified by keywords. The keywords recognized are `spnum=exp'
(identify this section by the number exp, an absolute expression),
`sort=exp' (order sections according to this sort key when linking;
exp is an absolute expression), `unloadable' (section contains no
loadable data), `notdefined' (this section defined elsewhere), and
`private' (data in this section not available to other programs).
.spnum secnam.space directive.)
.string "str"as strings.
Warning! The HPPA version of .string differs from the
usual as definition: it does not write a zero byte
after copying str.
.stringz "str".string, but appends a zero byte after copying str to object
file.
.subspa name [ ,params ].nsubspa name [ ,params ].space, but selects a subsection name within the
current section. You may only specify params when you create a
subsection (in the first instance of .subspa for this name).
If specified, the list params declares attributes of the subsection, identified by keywords. The keywords recognized are `quad=expr' (“quadrant” for this subsection), `align=expr' (alignment for beginning of this subsection; a power of two), `access=expr' (value for “access rights” field), `sort=expr' (sorting order for this subspace in link), `code_only' (subsection contains only code), `unloadable' (subsection cannot be loaded into memory), `comdat' (subsection is comdat), `common' (subsection is common block), `dup_comm' (subsection may have duplicate names), or `zero' (subsection is all zeros, do not write in object file).
.nsubspa always creates a new subspace with the given name, even
if one with the same name already exists.
`comdat', `common' and `dup_comm' can be used to implement various flavors of one-only support when using the SOM linker. The SOM linker only supports specific combinations of these flags. The details are not documented. A brief description is provided here.
`comdat' provides a form of linkonce support. It is useful for both code and data subspaces. A `comdat' subspace has a key symbol marked by the `is_comdat' flag or `ST_COMDAT'. Only the first subspace for any given key is selected. The key symbol becomes universal in shared links. This is similar to the behavior of `secondary_def' symbols.
`common' provides Fortran named common support. It is only useful for data subspaces. Symbols with the flag `is_common' retain this flag in shared links. Referencing a `is_common' symbol in a shared library from outside the library doesn't work. Thus, `is_common' symbols must be output whenever they are needed.
`common' and `dup_comm' together provide Cobol common support. The subspaces in this case must all be the same length. Otherwise, this support is similar to the Fortran common support.
`dup_comm' by itself provides a type of one-only support for code. Only the first `dup_comm' subspace is selected. There is a rather complex algorithm to compare subspaces. Code symbols marked with the `dup_common' flag are hidden. This support was intended for "C++ duplicate inlines".
A simplified technique is used to mark the flags of symbols based on
the flags of their subspace. A symbol with the scope SS_UNIVERSAL and
type ST_ENTRY, ST_CODE or ST_DATA is marked with the corresponding
settings of `comdat', `common' and `dup_comm' from the
subspace, respectively. This avoids having to introduce additional
directives to mark these symbols. The HP assembler sets `is_common'
from `common'. However, it doesn't set the `dup_common' from
`dup_comm'. It doesn't have `comdat' support.
.version "str"For detailed information on the HPPA machine instruction set, see PA-RISC Architecture and Instruction Set Reference Manual (HP 09740-90039).
The ESA/390 as port is currently intended to be a back-end
for the gnu cc compiler. It is not HLASM compatible, although
it does support a subset of some of the HLASM directives. The only
supported binary file format is ELF; none of the usual MVS/VM/OE/USS
object file formats, such as ESD or XSD, are supported.
When used with the gnu cc compiler, the ESA/390 as
will produce correct, fully relocated, functional binaries, and has been
used to compile and execute large projects. However, many aspects should
still be considered experimental; these include shared library support,
dynamically loadable objects, and any relocation other than the 31-bit
relocation.
as has no machine-dependent command-line options for the ESA/390.
The opcode/operand syntax follows the ESA/390 Principles of Operation manual; assembler directives and general syntax are loosely based on the prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives are not supported for the most part, with the exception of those described herein.
A leading dot in front of directives is optional, and the case of directives is ignored; thus for example, .using and USING have the same effect.
A colon may immediately follow a label definition. This is simply for compatibility with how most assembly language programmers write code.
`#' is the line comment character.
`;' can be used instead of a newline to separate statements.
Since `$' has no special meaning, you may use it in symbol names.
Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, fp6.
By using thesse symbolic names, as can detect simple
syntax errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca
for r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
for r3 and rpgt or r.pgt for r4.
`*' is the current location counter. Unlike `.' it is always relative to the last USING directive. Note that this means that expressions cannot use multiplication, as any occurrence of `*' will be interpreted as a location counter.
All labels are relative to the last USING. Thus, branches to a label always imply the use of base+displacement.
Many of the usual forms of address constants / address literals are supported. Thus,
.using *,r3
L r15,=A(some_routine)
LM r6,r7,=V(some_longlong_extern)
A r1,=F'12'
AH r0,=H'42'
ME r6,=E'3.1416'
MD r6,=D'3.14159265358979'
O r6,=XL4'cacad0d0'
.ltorg
should all behave as expected: that is, an entry in the literal
pool will be created (or reused if it already exists), and the
instruction operands will be the displacement into the literal pool
using the current base register (as last declared with the .using
directive).
The assembler generates only ieee floating-point numbers. The older floating point formats are not supported.
as for the ESA/390 supports all of the standard ELF/SVR4
assembler directives that are documented in the main part of this
documentation. Several additional directives are supported in order
to implement the ESA/390 addressing model. The most important of these
are .using and .ltorg
These are the additional directives in as for the ESA/390:
.dc.drop regno.using directive in the
same section as the current section.
.ebcdic string.string etc. emit
ascii strings by default.
EQUas directive .equ can be used to the same effect.
.ltorg.using must have been previously
specified in the same section.
.using expr,regnoThis assembler allows two .using directives to be simultaneously
outstanding, one in the .text section, and one in another section
(typically, the .data section). This feature allows
dynamically loaded objects to be implemented in a relatively
straightforward way. A .using directive must always be specified
in the .text section; this will specify the base register that
will be used for branches in the .text section. A second
.using may be specified in another section; this will specify
the base register that is used for non-label address literals.
When a second .using is specified, then the subsequent
.ltorg must be put in the same section; otherwise an error will
result.
Thus, for example, the following code uses r3 to address branch
targets and r4 to address the literal pool, which has been written
to the .data section. The is, the constants =A(some_routine),
=H'42' and =E'3.1416' will all appear in the .data
section.
.data
.using LITPOOL,r4
.text
BASR r3,0
.using *,r3
B START
.long LITPOOL
START:
L r4,4(,r3)
L r15,=A(some_routine)
LTR r15,r15
BNE LABEL
AH r0,=H'42'
LABEL:
ME r6,=E'3.1416'
.data
LITPOOL:
.ltorg
Note that this dual-.using directive semantics extends
and is not compatible with HLASM semantics. Note that this assembler
directive does not support the full range of HLASM semantics.
For detailed information on the ESA/390 machine instruction set, see ESA/390 Principles of Operation (IBM Publication Number DZ9AR004).
The i386 version as supports both the original Intel 386
architecture in both 16 and 32-bit mode as well as AMD x86-64 architecture
extending the Intel architecture to 64-bits.
The i386 version of as has a few machine
dependent options:
--32 | --64These options are only available with the ELF object file format, and
require that the necessary BFD support has been included (on a 32-bit
platform you have to add –enable-64-bit-bfd to configure enable 64-bit
usage and use x86-64 as target platform).
-n
as now supports assembly using Intel assembler syntax.
.intel_syntax selects Intel mode, and .att_syntax switches
back to the usual AT&T mode for compatibility with the output of
gcc. Either of these directives may have an optional
argument, prefix, or noprefix specifying whether registers
require a `%' prefix. AT&T System V/386 assembler syntax is quite
different from Intel syntax. We mention these differences because
almost all 80386 documents use Intel syntax. Notable differences
between the two syntaxes are:
Instruction mnemonics are suffixed with one character modifiers which
specify the size of operands. The letters `b', `w', `l'
and `q' specify byte, word, long and quadruple word operands. If
no suffix is specified by an instruction then as tries to
fill in the missing suffix based on the destination register operand
(the last one by convention). Thus, `mov %ax, %bx' is equivalent
to `movw %ax, %bx'; also, `mov $1, %bx' is equivalent to
`movw $1, bx'. Note that this is incompatible with the AT&T Unix
assembler which assumes that a missing mnemonic suffix implies long
operand size. (This incompatibility does not affect compiler output
since compilers always explicitly specify the mnemonic suffix.)
Almost all instructions have the same names in AT&T and Intel format. There are a few exceptions. The sign extend and zero extend instructions need two sizes to specify them. They need a size to sign/zero extend from and a size to zero extend to. This is accomplished by using two instruction mnemonic suffixes in AT&T syntax. Base names for sign extend and zero extend are `movs...' and `movz...' in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction mnemonic suffixes are tacked on to this base name, the from suffix before the to suffix. Thus, `movsbl %al, %edx' is AT&T syntax for “move sign extend from %al to %edx.” Possible suffixes, thus, are `bl' (from byte to long), `bw' (from byte to word), `wl' (from word to long), `bq' (from byte to quadruple word), `wq' (from word to quadruple word), and `lq' (from long to quadruple word).
The Intel-syntax conversion instructions
are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and
`cqto' in AT&T naming. as accepts either naming for these
instructions.
Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax, but are `call far' and `jump far' in Intel convention.
Register operands are always prefixed with `%'. The 80386 registers consist of
The AMD x86-64 architecture extends the register set by:
Instruction prefixes are used to modify the following instruction. They are used to repeat string instructions, to provide section overrides, to perform bus lock operations, and to change operand and address sizes. (Most instructions that normally operate on 32-bit operands will use 16-bit operands if the instruction has an “operand size” prefix.) Instruction prefixes are best written on the same line as the instruction they act upon. For example, the `scas' (scan string) instruction is repeated with:
repne scas %es:(%edi),%al
You may also place prefixes on the lines immediately preceding the
instruction, but this circumvents checks that as does
with prefixes, and will not work with all prefixes.
Here is a list of instruction prefixes:
.code16 section) into 32-bit operands/addresses. These prefixes
must appear on the same line of code as the instruction they
modify. For example, in a 16-bit .code16 section, you might
write:
addr32 jmpl *(%ebx)
64) used to change operand size
from 32-bit to 64-bit and X, Y and Z extensions bits used to extend the
register set.
You may write the `rex' prefixes directly. The `rex64xyz'
instruction emits `rex' prefix with all the bits set. By omitting
the 64, x, y or z you may write other
prefixes as well. Normally, there is no need to write the prefixes
explicitly, since gas will automatically generate them based on the
instruction operands.
An Intel syntax indirect memory reference of the form
section:[base + index*scale + disp]
is translated into the AT&T syntax
section:disp(base, index, scale)
where base and index are the optional 32-bit base and
index registers, disp is the optional displacement, and
scale, taking the values 1, 2, 4, and 8, multiplies index
to calculate the address of the operand. If no scale is
specified, scale is taken to be 1. section specifies the
optional section register for the memory operand, and may override the
default section register (see a 80386 manual for section register
defaults). Note that section overrides in AT&T syntax must
be preceded by a `%'. If you specify a section override which
coincides with the default section register, as does not
output any section register override prefixes to assemble the given
instruction. Thus, section overrides can be specified to emphasize which
section register is used for a given memory operand.
Here are some examples of Intel and AT&T style memory references:
Absolute (as opposed to PC relative) call and jump operands must be
prefixed with `*'. If no `*' is specified, as
always chooses PC relative addressing for jump/call labels.
Any instruction that has a memory operand, but no register operand, must specify its size (byte, word, long, or quadruple) with an instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
The x86-64 architecture adds an RIP (instruction pointer relative) addressing. This addressing mode is specified by using `rip' as a base register. Only constant offsets are valid. For example:
symbol in RIP relative way, this is shorter than
the default absolute addressing.
Other addressing modes remain unchanged in x86-64 architecture, except registers used are 64-bit instead of 32-bit.
Jump instructions are always optimized to use the smallest possible displacements. This is accomplished by using byte (8-bit) displacement jumps whenever the target is sufficiently close. If a byte displacement is insufficient a long displacement is used. We do not support word (16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump instruction with the `data16' instruction prefix), since the 80386 insists upon masking `%eip' to 16 bits after the word displacement is added. (See also see i386-Arch)
Note that the `jcxz', `jecxz', `loop', `loopz',
`loope', `loopnz' and `loopne' instructions only come in byte
displacements, so that if you use these instructions (gcc does
not use them) you may get an error message (and incorrect code). The AT&T
80386 assembler tries to get around this problem by expanding `jcxz foo'
to
jcxz cx_zero
jmp cx_nonzero
cx_zero: jmp foo
cx_nonzero:
All 80387 floating point types except packed BCD are supported. (BCD support may be added without much difficulty). These data types are 16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), and extended (80-bit) precision floating point. Each supported type has an instruction mnemonic suffix and a constructor associated with it. Instruction mnemonic suffixes specify the operand's data type. Constructors build these data types into memory.
Register to register operations should not use instruction mnemonic suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as if you wrote `fst %st, %st(1)', since all register to register operations use 80-bit floating point operands. (Contrast this with `fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating point format, then stores the result in the 4 byte location `mem')
as supports Intel's MMX instruction set (SIMD
instructions for integer data), available on Intel's Pentium MMX
processors and Pentium II processors, AMD's K6 and K6-2 processors,
Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow!
instruction set (SIMD instructions for 32-bit floating point data)
available on AMD's K6-2 processor and possibly others in the future.
Currently, as does not support Intel's floating point
SIMD, Katmai (KNI).
The eight 64-bit MMX operands, also used by 3DNow!, are called `%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four 16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit floating point values. The MMX registers cannot be used at the same time as the floating point stack.
See Intel and AMD documentation, keeping in mind that the operand order in instructions is reversed from the Intel syntax.
While as normally writes only “pure” 32-bit i386 code
or 64-bit x86-64 code depending on the default configuration,
it also supports writing code to run in real mode or in 16-bit protected
mode code segments. To do this, put a `.code16' or
`.code16gcc' directive before the assembly language instructions to
be run in 16-bit mode. You can switch as back to writing
normal 32-bit code with the `.code32' directive.
`.code16gcc' provides experimental support for generating 16-bit code from gcc, and differs from `.code16' in that `call', `ret', `enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf' instructions default to 32-bit size. This is so that the stack pointer is manipulated in the same way over function calls, allowing access to function parameters at the same stack offsets as in 32-bit mode. `.code16gcc' also automatically adds address size prefixes where necessary to use the 32-bit addressing modes that gcc generates.
The code which as generates in 16-bit mode will not
necessarily run on a 16-bit pre-80386 processor. To write code that
runs on such a processor, you must refrain from using any 32-bit
constructs which require as to output address or operand
size prefixes.
Note that writing 16-bit code instructions by explicitly specifying a prefix or an instruction mnemonic suffix within a 32-bit code section generates different machine instructions than those generated for a 16-bit code segment. In a 32-bit code section, the following code generates the machine opcode bytes `66 6a 04', which pushes the value `4' onto the stack, decrementing `%esp' by 2.
pushw $4
The same code in a 16-bit code section would generate the machine opcode bytes `6a 04' (ie. without the operand size prefix), which is correct since the processor default operand size is assumed to be 16 bits in a 16-bit code section.
The UnixWare assembler, and probably other AT&T derived ix86 Unix assemblers, generate floating point instructions with reversed source and destination registers in certain cases. Unfortunately, gcc and possibly many other programs use this reversed syntax, so we're stuck with it.
For example
fsub %st,%st(3)
results in `%st(3)' being updated to `%st - %st(3)' rather than the expected `%st(3) - %st'. This happens with all the non-commutative arithmetic floating point operations with two register operands where the source register is `%st' and the destination register is `%st(i)'.
as may be told to assemble for a particular CPU
(sub-)architecture with the .arch cpu_type directive. This
directive enables a warning when gas detects an instruction that is not
supported on the CPU specified. The choices for cpu_type are:
| `i8086' | `i186' | `i286' | `i386'
|
| `i486' | `i586' | `i686' | `pentium'
|
| `pentiumpro' | `pentiumii' | `pentiumiii' | `pentium4'
|
| `k6' | `athlon' `sledgehammer'
| ||
| `.mmx' `.sse' `.sse2' `.sse3' `.3dnow'
|
Apart from the warning, there are only two other effects on
as operation; Firstly, if you specify a CPU other than
`i486', then shift by one instructions such as `sarl $1, %eax'
will automatically use a two byte opcode sequence. The larger three
byte opcode sequence is used on the 486 (and when no architecture is
specified) because it executes faster on the 486. Note that you can
explicitly request the two byte opcode by writing `sarl %eax'.
Secondly, if you specify `i8086', `i186', or `i286',
and `.code16' or `.code16gcc' then byte offset
conditional jumps will be promoted when necessary to a two instruction
sequence consisting of a conditional jump of the opposite sense around
an unconditional jump to the target.
Following the CPU architecture (but not a sub-architecture, which are those
starting with a dot), you may specify `jumps' or `nojumps' to
control automatic promotion of conditional jumps. `jumps' is the
default, and enables jump promotion; All external jumps will be of the long
variety, and file-local jumps will be promoted as necessary.
(see i386-Jumps) `nojumps' leaves external conditional jumps as
byte offset jumps, and warns about file-local conditional jumps that
as promotes.
Unconditional jumps are treated as for `jumps'.
For example
.arch i8086,nojumps
There is some trickery concerning the `mul' and `imul'
instructions that deserves mention. The 16-, 32-, 64- and 128-bit expanding
multiplies (base opcode `0xf6'; extension 4 for `mul' and 5
for `imul') can be output only in the one operand form. Thus,
`imul %ebx, %eax' does not select the expanding multiply;
the expanding multiply would clobber the `%edx' register, and this
would confuse gcc output. Use `imul %ebx' to get the
64-bit product in `%edx:%eax'.
We have added a two operand form of `imul' when the first operand is an immediate mode expression and the second operand is a register. This is just a shorthand, so that, multiplying `%eax' by 69, for example, can be done with `imul $69, %eax' rather than `imul $69, %eax, %eax'.
This is a fairly complete i860 assembler which is compatible with the
UNIX System V/860 Release 4 assembler. However, it does not currently
support SVR4 PIC (i.e., @GOT, @GOTOFF, @PLT).
Like the SVR4/860 assembler, the output object format is ELF32. Currently, this is the only supported object format. If there is sufficient interest, other formats such as COFF may be implemented.
Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
being the default. One difference is that AT&T syntax requires the '%'
prefix on register names while Intel syntax does not. Another difference
is in the specification of relocatable expressions. The Intel syntax
is ha%expression whereas the SVR4 syntax is [expression]@ha
(and similarly for the "l" and "h" selectors).
-V-Qy-Qn-EL-EB-mwarn-expandor instruction with an immediate larger than 16-bits
will be expanded into two instructions. This is a very undesirable feature to
rely on, so this flag can help detect any code where it happens. One
use of it, for instance, has been to find and eliminate any place
where gcc may emit these pseudo-instructions.
-mxp-mintel-syntax.duald. prefix.
.endduald. prefix.
.atmpr31.
The .dual, .enddual, and .atmp directives are available only in the Intel syntax mode.
Both syntaxes allow for the standard .align directive. However,
the Intel syntax additionally allows keywords for the alignment
parameter: ".align type", where `type' is one of .short, .long,
.quad, .single, .double representing alignments of 2, 4,
16, 4, and 8, respectively.
All of the Intel i860XR and i860XP machine instructions are supported. Please see either i860 Microprocessor Programmer's Reference Manual or i860 Microprocessor Architecture for more information.
For compatibility with some other i860 assemblers, a number of pseudo-instructions are supported. While these are supported, they are a very undesirable feature that should be avoided – in particular, when they result in an expansion to multiple actual i860 instructions. Below are the pseudo-instructions that result in expansions.
The pseudo-instruction mov imm,%rn (where the immediate does
not fit within a signed 16-bit field) will be expanded into:
orh large_imm@h,%r0,%rn
or large_imm@l,%rn,%rn
For example, the pseudo-instruction ld.b addr_exp(%rx),%rn
will be expanded into:
orh addr_exp@ha,%rx,%r31
ld.l addr_exp@l(%r31),%rn
The analogous expansions apply to ld.x, st.x, fld.x, pfld.x, fst.x, and pst.x as well.
If any of the arithmetic operations adds, addu, subs, subu are used
with an immediate larger than 16-bits (signed), then they will be expanded.
For instance, the pseudo-instruction adds large_imm,%rx,%rn expands to:
orh large_imm@h,%r0,%r31
or large_imm@l,%r31,%r31
adds %r31,%rx,%rn
Logical operations (or, andnot, or, xor) also result in expansions.
The pseudo-instruction or large_imm,%rx,%rn results in:
orh large_imm@h,%rx,%r31
or large_imm@l,%r31,%rn
Similarly for the others, except for and which expands to:
andnot (-1 - large_imm)@h,%rx,%r31
andnot (-1 - large_imm)@l,%r31,%rn
-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC`-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'. Synonyms are provided for compatibility with other tools.
If you do not specify any of these options, as generates code
for any instruction or feature that is supported by some version of the
960 (even if this means mixing architectures!). In principle,
as attempts to deduce the minimal sufficient processor type if
none is specified; depending on the object code format, the processor type may
be recorded in the object file. If it is critical that the as
output match a specific architecture, specify that architecture explicitly.
-b call increment routine
.word 0 # pre-counter
Label: BR
call increment routine
.word 0 # post-counter
The counter following a branch records the number of times that branch was not taken; the differenc between the two counters is the number of times the branch was taken.
A table of every such Label is also generated, so that the
external postprocessor gbr960 (supplied by Intel) can locate all
the counters. This table is always labeled `__BRANCH_TABLE__';
this is a local symbol to permit collecting statistics for many separate
object files. The table is word aligned, and begins with a two-word
header. The first word, initialized to 0, is used in maintaining linked
lists of branch tables. The second word is a count of the number of
entries in the table, which follow immediately: each is a word, pointing
to one of the labels illustrated above.
The first word of the header is used to locate multiple branch tables, since each object file may contain one. Normally the links are maintained with a call to an initialization routine, placed at the beginning of each function in the file. The gnu C compiler generates these calls automatically when you give it a `-b' option. For further details, see the documentation of `gbr960'.
-no-relaxas should generate errors instead, if the target displacement
is larger than 13 bits.
This option does not affect the Compare-and-Jump instructions; the code emitted for them is always adjusted when necessary (depending on displacement size), regardless of whether you use `-no-relax'.
as generates ieee floating-point numbers for the directives
`.float', `.double', `.extended', and `.single'.
.bss symbol, length, align.lcomm.
.extended flonums.extended expects zero or more flonums, separated by commas; for
each flonum, `.extended' emits an ieee extended-format (80-bit)
floating-point number.
.leafproc call-lab, bal-labcallj instruction to enable faster calls of leaf
procedures. If a procedure is known to call no other procedures, you
may define an entry point that skips procedure prolog code (and that does
not depend on system-supplied saved context), and declare it as the
bal-lab using `.leafproc'. If the procedure also has an
entry point that goes through the normal prolog, you can specify that
entry point as call-lab.
A `.leafproc' declaration is meant for use in conjunction with the
optimized call instruction `callj'; the directive records the data
needed later to choose between converting the `callj' into a
bal or a call.
call-lab is optional; if only one argument is present, or if the
two arguments are identical, the single argument is assumed to be the
bal entry point.
.sysproc name, indexBoth arguments are required; index must be between 0 and 31 (inclusive).